<p>Felix Held has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27386">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">superio/nuvoton: remove LDN-specific ops overrides<br><br>The pnp ops struct is already passed to the pnp_enable_devices function and it<br>is used if no override is supplied in the elements of the pnp_info struct array<br><br>Change-Id: I18345d7cc50a7d46cb15584dfb54df28e8534f81<br>Signed-off-by: Felix Held <felix-coreboot@felixheld.de><br>---<br>M src/superio/nuvoton/nct5104d/superio.c<br>M src/superio/nuvoton/nct5572d/superio.c<br>M src/superio/nuvoton/nct6776/superio.c<br>M src/superio/nuvoton/nct6779d/superio.c<br>M src/superio/nuvoton/nct6791d/superio.c<br>M src/superio/nuvoton/npcd378/superio.c<br>M src/superio/nuvoton/wpcm450/superio.c<br>7 files changed, 132 insertions(+), 127 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/27386/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c</span><br><span>index 76e1ffc..47687e1 100644</span><br><span>--- a/src/superio/nuvoton/nct5104d/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct5104d/superio.c</span><br><span>@@ -147,17 +147,17 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_FDC,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_SP3,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_SP4,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_GPIO_WDT},</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NCT5104D_GPIO_PP_OD},</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5104D_GPIO0},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5104D_GPIO1},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5104D_GPIO6},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5104D_PORT80},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_FDC,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_SP3,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_SP4,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_GPIO_WDT},</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT5104D_GPIO_PP_OD},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5104D_GPIO0},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5104D_GPIO1},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5104D_GPIO6},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5104D_PORT80},</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c</span><br><span>index 12b1c78..10542d5 100644</span><br><span>--- a/src/superio/nuvoton/nct5572d/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct5572d/superio.c</span><br><span>@@ -95,27 +95,29 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT5572D_FDC}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT5572D_PP}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NCT5572D_SP1, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT5572D_IR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NCT5572D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, 0x0FFF, 0x0FFF, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT5572D_CIR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT5572D_WDT1},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT5572D_ACPI},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT5572D_HWM_TSI_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0FFE, 0x0FFE, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_PECI},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT5572D_SUSLED},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT5572D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO_PP_OD},</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT5572D_GPIO2},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO3},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO4}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT5572D_GPIO5},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO6},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO7}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT5572D_GPIO8},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT5572D_GPIO9},</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT5572D_FDC}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT5572D_PP}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT5572D_SP1, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT5572D_IR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT5572D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span style="color: hsl(120, 100%, 40%);">+                0x0FFF, 0x0FFF, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT5572D_CIR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT5572D_WDT1},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT5572D_ACPI},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT5572D_HWM_TSI_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+         0x0FFE, 0x0FFE, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT5572D_PECI},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT5572D_SUSLED},</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT5572D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0FF8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO_PP_OD},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT5572D_GPIO2},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO3},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO4}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT5572D_GPIO5},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO6},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO7}, /* no pins, removed from datasheet */</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT5572D_GPIO8},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT5572D_GPIO9},</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/nuvoton/nct6776/superio.c b/src/superio/nuvoton/nct6776/superio.c</span><br><span>index 1512d56..033f646 100644</span><br><span>--- a/src/superio/nuvoton/nct6776/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct6776/superio.c</span><br><span>@@ -50,42 +50,42 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span>          0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span>           0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_SP1, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6776_SP1, PNP_IO0 | PNP_IRQ0,</span><br><span>             0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_SP2, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6776_SP2, PNP_IO0 | PNP_IRQ0,</span><br><span>             0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span>                0x0fff, 0x0fff, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_CIR, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6776_CIR, PNP_IO0 | PNP_IRQ0,</span><br><span>             0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_ACPI},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6776_ACPI},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span>             0x0ffe, 0x0ffe, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_VID},</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6776_VID},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0,</span><br><span>                 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_GPIO_PP_OD},</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT6776_SVID},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_DSLP},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_GPIOA_LDN},</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NCT6776_WDT1},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_GPIOBASE, PNP_IO0,</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_GPIO_PP_OD},</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6776_SVID},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_DSLP},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_GPIOA_LDN},</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT6776_WDT1},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6776_GPIOBASE, PNP_IO0,</span><br><span>           0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6776_GPIO0},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO1},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO2},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO3},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO4},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO5},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO6},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO7},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO8},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIO9},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6776_GPIOA},</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT6776_GPIO0},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO1},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO2},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO3},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO4},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO5},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO6},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO7},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO8},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIO9},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6776_GPIOA},</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c</span><br><span>index 887ce7c..465ef66 100644</span><br><span>--- a/src/superio/nuvoton/nct6779d/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct6779d/superio.c</span><br><span>@@ -50,28 +50,30 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, 0x0fff, 0x0fff, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT6779D_ACPI},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ffe, 0x0ffe, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NCT6779D_WDT1},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO_PP_OD},</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT6779D_PRT80},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_DSLP},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6779D_GPIO0},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO1},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO2},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO3},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO4},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO5},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO6},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO7},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6779D_GPIO8},</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span style="color: hsl(120, 100%, 40%);">+                0x0fff, 0x0fff, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NCT6779D_ACPI},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+             0x0ffe, 0x0ffe, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT6779D_WDT1},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO_PP_OD},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6779D_PRT80},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_DSLP},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6779D_GPIO0},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO1},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO2},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO3},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO4},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO5},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO6},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO7},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6779D_GPIO8},</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/nuvoton/nct6791d/superio.c b/src/superio/nuvoton/nct6791d/superio.c</span><br><span>index f66689e..c2d5f2e 100644</span><br><span>--- a/src/superio/nuvoton/nct6791d/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct6791d/superio.c</span><br><span>@@ -50,44 +50,44 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6791D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,</span><br><span>          0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_SP1, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6791D_SP1, PNP_IO0 | PNP_IRQ0,</span><br><span>            0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_SP2, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6791D_SP2, PNP_IO0 | PNP_IRQ0,</span><br><span>            0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT6791D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,</span><br><span>               0x0fff, 0x0fff, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_CIR, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6791D_CIR, PNP_IO0 | PNP_IRQ0,</span><br><span>            0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_ACPI},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6791D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6791D_ACPI},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6791D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,</span><br><span>            0x0ffe, 0x0ffe, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_BCLK_WDT2_WDTMEM},</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NCT6791D_CIRWUP, PNP_IO0 | PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_BCLK_WDT2_WDTMEM},</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT6791D_CIRWUP, PNP_IO0 | PNP_IRQ0,</span><br><span>                 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_GPIO_PP_OD},</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, NCT6791D_PORT80},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT6791D_WDT1},</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, NCT6791D_WDTMEM},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT6791D_GPIOBASE, PNP_IO0,</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6791D_GPIO_PP_OD},</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NCT6791D_PORT80},</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT6791D_WDT1},</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NCT6791D_WDTMEM},</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT6791D_GPIOBASE, PNP_IO0,</span><br><span>          0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_GPIO0},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO1},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO2},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO3},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO4},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO5},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO6},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO7},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_GPIO8},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_DS5},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_DS3},</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NCT6791D_PCHDSW},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT6791D_DSWWOPT},</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, NCT6791D_DS3OPT},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NCT6791D_DSDSS},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, NCT6791D_DSPU},</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NCT6791D_GPIO0},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO1},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO2},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO3},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO4},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO5},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO6},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO7},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_GPIO8},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_DS5},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6791D_DS3},</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, NCT6791D_PCHDSW},</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT6791D_DSWWOPT},</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NCT6791D_DS3OPT},</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NCT6791D_DSDSS},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, NCT6791D_DSPU},</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c</span><br><span>index 013225d..408429c 100644</span><br><span>--- a/src/superio/nuvoton/npcd378/superio.c</span><br><span>+++ b/src/superio/nuvoton/npcd378/superio.c</span><br><span>@@ -111,30 +111,30 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|</span><br><span>              PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|</span><br><span>              PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,</span><br><span>              0x0ff8, 0x0ff8},</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0,</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0,</span><br><span>               0x0fff, 0x0fff, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9|</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9|</span><br><span>             PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, 0x0ff8},</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span>            PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_IRQ0, 0x0ff8},</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span>             PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_MSC8|PNP_MSC9|PNP_MSCA|</span><br><span>              PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE},</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|</span><br><span>              PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|</span><br><span>              PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,</span><br><span>              0x0ff8, 0x0ff8},</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, NPCD378_SUSPEND, PNP_IO0, 0x0ff8 },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, NPCD378_SUSPEND, PNP_IO0, 0x0ff8 },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|</span><br><span>          PNP_MSC4, 0x0ff8},</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c</span><br><span>index 0a42d13..05078eb 100644</span><br><span>--- a/src/superio/nuvoton/wpcm450/superio.c</span><br><span>+++ b/src/superio/nuvoton/wpcm450/superio.c</span><br><span>@@ -45,9 +45,10 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, WPCM450_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, WPCM450_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, WPCM450_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, WPCM450_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,</span><br><span style="color: hsl(120, 100%, 40%);">+               0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, WPCM450_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, WPCM450_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27386">change 27386</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27386"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I18345d7cc50a7d46cb15584dfb54df28e8534f81 </div>
<div style="display:none"> Gerrit-Change-Number: 27386 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de> </div>