<p>Felix Held has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27387">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">superio/fintek: remove LDN-specific ops overrides<br><br>The pnp ops struct is already passed to the pnp_enable_devices function and it<br>is used if no override is supplied in the elements of the pnp_info struct array<br><br>Change-Id: Ic6387032e043b6ad9e9ceefd2fcc1cdf843e2989<br>Signed-off-by: Felix Held <felix-coreboot@felixheld.de><br>---<br>M src/superio/fintek/f71805f/superio.c<br>M src/superio/fintek/f71808a/superio.c<br>M src/superio/fintek/f71859/superio.c<br>M src/superio/fintek/f71863fg/superio.c<br>M src/superio/fintek/f71869ad/superio.c<br>M src/superio/fintek/f71872/superio.c<br>M src/superio/fintek/f81216h/superio.c<br>M src/superio/fintek/f81865f/superio.c<br>M src/superio/fintek/f81866d/superio.c<br>9 files changed, 70 insertions(+), 70 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/27387/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c</span><br><span>index c03d10f..d702eec 100644</span><br><span>--- a/src/superio/fintek/f71805f/superio.c</span><br><span>+++ b/src/superio/fintek/f71805f/superio.c</span><br><span>@@ -41,13 +41,13 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>  /* TODO: Some of the 0x07f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71805F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F71805F_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71805F_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71805F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F71805F_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71805F_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71805F_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F71805F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F71805F_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71805F_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71805F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F71805F_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71805F_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, F71805F_PME, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f71808a/superio.c b/src/superio/fintek/f71808a/superio.c</span><br><span>index eef7242..e8fcd95 100644</span><br><span>--- a/src/superio/fintek/f71808a/superio.c</span><br><span>+++ b/src/superio/fintek/f71808a/superio.c</span><br><span>@@ -54,13 +54,13 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>  /* TODO: Some of the 0x07f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71808A_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71808A_HWM,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71808A_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F71808A_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71808A_WDT,  PNP_IO0, 0x07f8,},</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71808A_CIR,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F71808A_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F71808A_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71808A_HWM,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71808A_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F71808A_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, F71808A_WDT,  PNP_IO0, 0x07f8,},</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71808A_CIR,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71808A_PME, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c</span><br><span>index 6de68df..976cb87f 100644</span><br><span>--- a/src/superio/fintek/f71859/superio.c</span><br><span>+++ b/src/superio/fintek/f71859/superio.c</span><br><span>@@ -42,7 +42,7 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>       /* TODO: Some of the 0x07f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71859_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, F71859_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c</span><br><span>index 3ed269e..bfa0aee 100644</span><br><span>--- a/src/superio/fintek/f71863fg/superio.c</span><br><span>+++ b/src/superio/fintek/f71863fg/superio.c</span><br><span>@@ -50,16 +50,16 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>   /* TODO: Some of the 0x07f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71863FG_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71863FG_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71863FG_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71863FG_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71863FG_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71863FG_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71863FG_GPIO, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, F71863FG_VID,  PNP_IO0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71863FG_SPI, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71863FG_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71863FG_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71863FG_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71863FG_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71863FG_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71863FG_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71863FG_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71863FG_GPIO, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, F71863FG_VID,  PNP_IO0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, F71863FG_SPI, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71863FG_PME, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c</span><br><span>index 43a9ee6..7fc4db4 100644</span><br><span>--- a/src/superio/fintek/f71869ad/superio.c</span><br><span>+++ b/src/superio/fintek/f71869ad/superio.c</span><br><span>@@ -106,16 +106,16 @@</span><br><span>  *</span><br><span>  */</span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F71869AD_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71869AD_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71869AD_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71869AD_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71869AD_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71869AD_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71869AD_GPIO, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, F71869AD_WDT, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71869AD_CIR,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-       { &ops, F71869AD_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F71869AD_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71869AD_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71869AD_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71869AD_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71869AD_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71869AD_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71869AD_GPIO, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, F71869AD_WDT, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71869AD_CIR,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ { NULL, F71869AD_PME, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c</span><br><span>index c2163bd..f26a0c6 100644</span><br><span>--- a/src/superio/fintek/f71872/superio.c</span><br><span>+++ b/src/superio/fintek/f71872/superio.c</span><br><span>@@ -48,15 +48,15 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>     /* TODO: Some of the 0x07f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F71872_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, F71872_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F71872_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F71872_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, F71872_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F71872_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-      { &ops, F71872_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, F71872_VID,  PNP_IO0, 0x0ff8, },</span><br><span style="color: hsl(0, 100%, 40%);">-    { &ops, F71872_PM, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, F71872_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, F71872_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F71872_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F71872_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, F71872_HWM,  PNP_IO0 | PNP_IRQ0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F71872_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+        { NULL, F71872_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(120, 100%, 40%);">+     { NULL, F71872_VID,  PNP_IO0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+      { NULL, F71872_PM, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f81216h/superio.c b/src/superio/fintek/f81216h/superio.c</span><br><span>index 17483c3..2791876 100644</span><br><span>--- a/src/superio/fintek/f81216h/superio.c</span><br><span>+++ b/src/superio/fintek/f81216h/superio.c</span><br><span>@@ -94,11 +94,11 @@</span><br><span> };</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81216H_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F81216H_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F81216H_SP3,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F81216H_SP4,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-        { &ops, F81216H_WDT, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81216H_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F81216H_SP2,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F81216H_SP3,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F81216H_SP4,  PNP_IO0 | PNP_IRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+  { NULL, F81216H_WDT, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c</span><br><span>index 5bc4f6e..08cbd90 100644</span><br><span>--- a/src/superio/fintek/f81865f/superio.c</span><br><span>+++ b/src/superio/fintek/f81865f/superio.c</span><br><span>@@ -48,14 +48,14 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>  /* TODO: Some of the 0x7f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, F81865F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81865F_SP1,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81865F_SP2,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81865F_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81865F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81865F_HWM,  PNP_IO0 | PNP_IRQ0, 0xff8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81865F_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F81865F_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81865F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81865F_SP1,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81865F_SP2,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81865F_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81865F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81865F_HWM,  PNP_IO0 | PNP_IRQ0, 0xff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81865F_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, F81865F_PME, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span>diff --git a/src/superio/fintek/f81866d/superio.c b/src/superio/fintek/f81866d/superio.c</span><br><span>index 938019d..7678383 100644</span><br><span>--- a/src/superio/fintek/f81866d/superio.c</span><br><span>+++ b/src/superio/fintek/f81866d/superio.c</span><br><span>@@ -70,19 +70,19 @@</span><br><span> </span><br><span> static struct pnp_info pnp_dev_info[] = {</span><br><span>  /* TODO: Some of the 0x7f8 etc. values may not be correct. */</span><br><span style="color: hsl(0, 100%, 40%);">-   { &ops, F81866D_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81866D_SP1,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_SP2,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_SP3,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_SP4,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_SP5,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_SP6,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81866D_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81866D_HWM,  PNP_IO0 | PNP_IRQ0, 0xff8, },</span><br><span style="color: hsl(0, 100%, 40%);">- { &ops, F81866D_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(0, 100%, 40%);">-  { &ops, F81866D_PME, },</span><br><span style="color: hsl(0, 100%, 40%);">-     { &ops, F81866D_WDT, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81866D_SP1,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_SP2,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_SP3,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_SP4,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_SP5,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_SP6,  PNP_IO0 | PNP_IRQ0, 0x7f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81866D_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81866D_HWM,  PNP_IO0 | PNP_IRQ0, 0xff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+   { NULL, F81866D_GPIO, PNP_IRQ0, },</span><br><span style="color: hsl(120, 100%, 40%);">+    { NULL, F81866D_PME, },</span><br><span style="color: hsl(120, 100%, 40%);">+       { NULL, F81866D_WDT, },</span><br><span> };</span><br><span> </span><br><span> static void enable_dev(struct device *dev)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27387">change 27387</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27387"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic6387032e043b6ad9e9ceefd2fcc1cdf843e2989 </div>
<div style="display:none"> Gerrit-Change-Number: 27387 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de> </div>