<p>Anonymous Coward (1001664) has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27356">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">riscv: add spin lock support<br><br>Add spin lock support for riscv.<br><br>Change-Id: I7e93fb8b35c4452f0fe3f7f4bcc6f7aa4e042451<br>Signed-off-by: Xiang Wang <wxjstz@126.com><br>---<br>M src/arch/riscv/include/arch/smp/atomic.h<br>M src/arch/riscv/include/arch/smp/spinlock.h<br>2 files changed, 26 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/27356/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/riscv/include/arch/smp/atomic.h b/src/arch/riscv/include/arch/smp/atomic.h</span><br><span>index 15702e4..f1d8e45 100644</span><br><span>--- a/src/arch/riscv/include/arch/smp/atomic.h</span><br><span>+++ b/src/arch/riscv/include/arch/smp/atomic.h</span><br><span>@@ -33,9 +33,6 @@</span><br><span> #define disable_irqsave() clear_csr(mstatus, MSTATUS_MIE)</span><br><span> #define enable_irqrestore(flags) set_csr(mstatus, (flags) & MSTATUS_MIE)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-typedef struct { int lock; } spinlock_t;</span><br><span style="color: hsl(0, 100%, 40%);">-#define SPINLOCK_INIT {0}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)</span><br><span> #define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))</span><br><span> </span><br><span>diff --git a/src/arch/riscv/include/arch/smp/spinlock.h b/src/arch/riscv/include/arch/smp/spinlock.h</span><br><span>index bdf8ec4..089ab9f 100644</span><br><span>--- a/src/arch/riscv/include/arch/smp/spinlock.h</span><br><span>+++ b/src/arch/riscv/include/arch/smp/spinlock.h</span><br><span>@@ -10,3 +10,29 @@</span><br><span>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef _SPINLOCK_H_</span><br><span style="color: hsl(120, 100%, 40%);">+#define _SPINLOCK_H_</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/encoding.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/smp/atomic.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define barrier() { asm volatile ("fence" ::: "memory"); }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+typedef struct {</span><br><span style="color: hsl(120, 100%, 40%);">+    volatile unsigned int lock;</span><br><span style="color: hsl(120, 100%, 40%);">+} spinlock_t;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static inline void spinlock_lock(spinlock_t *lock)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+   do {</span><br><span style="color: hsl(120, 100%, 40%);">+  } while (atomic_cas(&lock->lock, 0, -1));</span><br><span style="color: hsl(120, 100%, 40%);">+      barrier();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static inline void spinlock_unlock(spinlock_t *lock)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+      barrier();</span><br><span style="color: hsl(120, 100%, 40%);">+    atomic_set(&lock->lock, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif                         //_SPINLOCK_H_</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27356">change 27356</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27356"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7e93fb8b35c4452f0fe3f7f4bcc6f7aa4e042451 </div>
<div style="display:none"> Gerrit-Change-Number: 27356 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Anonymous Coward (1001664) </div>