<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27287">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common/pmutil: Use new PMBASE API<br><br>Change-Id: I0f37f0c49fd58adafd8a508e806e0f30759a6963<br>Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com><br>---<br>M src/southbridge/intel/common/pmutil.c<br>1 file changed, 25 insertions(+), 31 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/27287/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c</span><br><span>index 03ae473..4e0e357 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.c</span><br><span>+++ b/src/southbridge/intel/common/pmutil.c</span><br><span>@@ -29,20 +29,18 @@</span><br><span> </span><br><span> void alt_gpi_mask(u16 clr, u16 set)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-        u16 pmbase = get_pmbase();</span><br><span style="color: hsl(0, 100%, 40%);">-      u16 alt_gp = inw(pmbase + ALT_GP_SMI_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+     u16 alt_gp = read_pmbase16(ALT_GP_SMI_EN);</span><br><span>   alt_gp &= ~clr;</span><br><span>  alt_gp |= set;</span><br><span style="color: hsl(0, 100%, 40%);">-  outw(alt_gp, pmbase + ALT_GP_SMI_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(ALT_GP_SMI_EN, alt_gp);</span><br><span> }</span><br><span> </span><br><span> void gpe0_mask(u32 clr, u32 set)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-        u16 pmbase = get_pmbase();</span><br><span style="color: hsl(0, 100%, 40%);">-      u32 gpe0 = inl(pmbase + GPE0_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+     u32 gpe0 = read_pmbase32(GPE0_EN);</span><br><span>   gpe0 &= ~clr;</span><br><span>    gpe0 |= set;</span><br><span style="color: hsl(0, 100%, 40%);">-    outl(gpe0, pmbase + GPE0_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase32(GPE0_EN, gpe0);</span><br><span> }</span><br><span> </span><br><span> /**</span><br><span>@@ -51,12 +49,9 @@</span><br><span>  */</span><br><span> u16 reset_pm1_status(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   u16 pmbase = get_pmbase();</span><br><span style="color: hsl(0, 100%, 40%);">-      u16 reg16;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      reg16 = inw(pmbase + PM1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+        u16 reg16 = read_pmbase16(PM1_STS);</span><br><span>  /* set status bits are cleared by writing 1 to them */</span><br><span style="color: hsl(0, 100%, 40%);">-  outw(reg16, pmbase + PM1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+        write_pmbase16(PM1_STS, reg16);</span><br><span> </span><br><span>  return reg16;</span><br><span> }</span><br><span>@@ -73,7 +68,8 @@</span><br><span>       if (pm1_sts & (1 <<  4)) printk(BIOS_SPEW, "BM ");</span><br><span>       if (pm1_sts & (1 <<  0)) printk(BIOS_SPEW, "TMROF ");</span><br><span>    printk(BIOS_SPEW, "\n");</span><br><span style="color: hsl(0, 100%, 40%);">-      int reg16 = inw(get_pmbase() + PM1_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+     int reg16 = read_pmbase16(PM1_EN);</span><br><span>   printk(BIOS_SPEW, "PM1_EN: %x\n", reg16);</span><br><span> }</span><br><span> </span><br><span>@@ -83,12 +79,11 @@</span><br><span>  */</span><br><span> u32 reset_smi_status(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-    u16 pmbase = get_pmbase();</span><br><span>   u32 reg32;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  reg32 = inl(pmbase + SMI_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+        reg32 = read_pmbase32(SMI_STS);</span><br><span>      /* set status bits are cleared by writing 1 to them */</span><br><span style="color: hsl(0, 100%, 40%);">-  outl(reg32, pmbase + SMI_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+        write_pmbase32(SMI_STS, reg32);</span><br><span> </span><br><span>  return reg32;</span><br><span> }</span><br><span>@@ -125,14 +120,13 @@</span><br><span>  */</span><br><span> u64 reset_gpe0_status(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   u16 pmbase = get_pmbase();</span><br><span>   u32 reg_h, reg_l;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-   reg_l = inl(pmbase + GPE0_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- reg_h = inl(pmbase + GPE0_STS + 4);</span><br><span style="color: hsl(120, 100%, 40%);">+   reg_l = read_pmbase32(GPE0_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+      reg_h = read_pmbase32(GPE0_STS + 4);</span><br><span>         /* set status bits are cleared by writing 1 to them */</span><br><span style="color: hsl(0, 100%, 40%);">-  outl(reg_l, pmbase + GPE0_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- outl(reg_h, pmbase + GPE0_STS + 4);</span><br><span style="color: hsl(120, 100%, 40%);">+   write_pmbase32(GPE0_STS, reg_l);</span><br><span style="color: hsl(120, 100%, 40%);">+      write_pmbase32(GPE0_STS + 4, reg_h);</span><br><span> </span><br><span>     return (((u64)reg_h) << 32) | reg_l;</span><br><span> }</span><br><span>@@ -169,14 +163,16 @@</span><br><span>  */</span><br><span> u32 reset_tco_status(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       u32 tcobase = get_pmbase() + 0x60;</span><br><span>   u32 reg32;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  reg32 = inl(tcobase + 0x04);</span><br><span style="color: hsl(0, 100%, 40%);">-    /* set status bits are cleared by writing 1 to them */</span><br><span style="color: hsl(0, 100%, 40%);">-  outl(reg32 & ~(1<<18), tcobase + 0x04); //  Don't clear BOOT_STS before SECOND_TO_STS</span><br><span style="color: hsl(120, 100%, 40%);">+   reg32 = read_pmbase32(0x60 + 0x04);</span><br><span style="color: hsl(120, 100%, 40%);">+   /*</span><br><span style="color: hsl(120, 100%, 40%);">+     * set status bits are cleared by writing 1 to them, but don't</span><br><span style="color: hsl(120, 100%, 40%);">+     * clear BOOT_STS before SECOND_TO_STS.</span><br><span style="color: hsl(120, 100%, 40%);">+        */</span><br><span style="color: hsl(120, 100%, 40%);">+   write_pmbase32(0x60 + 0x04, reg32 & ~(1<<18));</span><br><span>     if (reg32 & (1 << 18))</span><br><span style="color: hsl(0, 100%, 40%);">-                outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS</span><br><span style="color: hsl(120, 100%, 40%);">+            write_pmbase32(0x60 + 0x04, reg32 & (1<<18)); // clear BOOT_STS</span><br><span> </span><br><span>        return reg32;</span><br><span> }</span><br><span>@@ -206,12 +202,11 @@</span><br><span>  */</span><br><span> void smi_set_eos(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-        u16 pmbase = get_pmbase();</span><br><span>   u8 reg8;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-    reg8 = inb(pmbase + SMI_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+  reg8 = read_pmbase8(SMI_EN);</span><br><span>         reg8 |= EOS;</span><br><span style="color: hsl(0, 100%, 40%);">-    outb(reg8, pmbase + SMI_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+  write_pmbase8(SMI_EN, reg8);</span><br><span> }</span><br><span> </span><br><span> </span><br><span>@@ -231,12 +226,11 @@</span><br><span>  */</span><br><span> u16 reset_alt_gp_smi_status(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-      u16 pmbase = get_pmbase();</span><br><span>   u16 reg16;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  reg16 = inl(pmbase + ALT_GP_SMI_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(ALT_GP_SMI_STS);</span><br><span>       /* set status bits are cleared by writing 1 to them */</span><br><span style="color: hsl(0, 100%, 40%);">-  outl(reg16, pmbase + ALT_GP_SMI_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(ALT_GP_SMI_STS, reg16);</span><br><span> </span><br><span>   return reg16;</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27287">change 27287</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27287"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0f37f0c49fd58adafd8a508e806e0f30759a6963 </div>
<div style="display:none"> Gerrit-Change-Number: 27287 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com> </div>