<p><a href="https://review.coreboot.org/25068">View Change</a></p><p>13 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/include/intelblocks/early_mmc.h">File src/soc/intel/common/block/include/intelblocks/early_mmc.h:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/include/intelblocks/early_mmc.h@26">Patch Set #8, Line 26:</a> <code style="font-family:monospace,monospace"> * emmc_rx_cmd_data_cntl1: Rx CMD Data Delay Control 1 (Rx_CMD_Data_dly_1)—Offset 82Ch</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/include/intelblocks/early_mmc.h@27">Patch Set #8, Line 27:</a> <code style="font-family:monospace,monospace"> * emmc_rx_strobe_cntl: Rx Strobe Delay Control (Rx_Strobe_Ctrl_Path)—Offset 830h</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/include/intelblocks/early_mmc.h@28">Patch Set #8, Line 28:</a> <code style="font-family:monospace,monospace"> * emmc_rx_cmd_data_cntl2: Rx CMD Data Path Delay Control 2 (Rx_CMD_Data_dly_2)—Offset 834h</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c">File src/soc/intel/common/block/scs/early_mmc.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@56">Patch Set #8, Line 56:</a> <code style="font-family:monospace,monospace">        *ctrlr)</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">code indent should use tabs where possible</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@56">Patch Set #8, Line 56:</a> <code style="font-family:monospace,monospace">        *ctrlr)</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">please, no spaces at the start of a line</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@91">Patch Set #8, Line 91:</a> <code style="font-family:monospace,monospace">     write32(ioaddr + EMMC_TX_DATA_CNTL1_OFFSET, </code></p><p style="white-space: pre-wrap; word-wrap: break-word;">trailing whitespace</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@93">Patch Set #8, Line 93:</a> <code style="font-family:monospace,monospace">  write32(ioaddr + EMMC_TX_DATA_CNTL2_OFFSET, </code></p><p style="white-space: pre-wrap; word-wrap: break-word;">trailing whitespace</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@95">Patch Set #8, Line 95:</a> <code style="font-family:monospace,monospace">  write32(ioaddr + EMMC_RX_CMD_DATA_CNTL1_OFFSET, </code></p><p style="white-space: pre-wrap; word-wrap: break-word;">trailing whitespace</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@97">Patch Set #8, Line 97:</a> <code style="font-family:monospace,monospace">      write32(ioaddr + EMMC_RX_CMD_DATA_CNTL2_OFFSET, </code></p><p style="white-space: pre-wrap; word-wrap: break-word;">trailing whitespace</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@99">Patch Set #8, Line 99:</a> <code style="font-family:monospace,monospace">      write32(ioaddr + EMMC_RX_STROBE_CNTL_OFFSET, </code></p><p style="white-space: pre-wrap; word-wrap: break-word;">trailing whitespace</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@145">Patch Set #8, Line 145:</a> <code style="font-family:monospace,monospace">       mmc_ctrlr = new_mem_sdhci_controller((void*) ioaddr);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">"(foo*)" should be "(foo *)"</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@148">Patch Set #8, Line 148:</a> <code style="font-family:monospace,monospace">  if (set_mmc_dll((void*) ioaddr) < 0)</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">that open brace { should be on the previous line</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/25068/8/src/soc/intel/common/block/scs/early_mmc.c@148">Patch Set #8, Line 148:</a> <code style="font-family:monospace,monospace">        if (set_mmc_dll((void*) ioaddr) < 0)</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">"(foo*)" should be "(foo *)"</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/25068">change 25068</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25068"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: comment </div>
<div style="display:none"> Gerrit-Change-Id: I3488b077bf5100a1e0f2c879fb1436105607d25e </div>
<div style="display:none"> Gerrit-Change-Number: 25068 </div>
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<div style="display:none"> Gerrit-Owner: Bora Guvendik <bora.guvendik@intel.com> </div>
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<div style="display:none"> Gerrit-Comment-Date: Thu, 28 Jun 2018 00:40:15 +0000 </div>
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