<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27258">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/common: Add CPUID for new SOC<br><br>Include Coffeelake and Whiskeylake CPUID definition.<br><br>Change-Id: Icb41763d20aa4c714ca09a57e59c02c3dce7ee52<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/common/block/cpu/mp_init.c<br>M src/soc/intel/common/block/include/intelblocks/mp_init.h<br>2 files changed, 4 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/27258/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>index fd0ac99..75ab268 100644</span><br><span>--- a/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>+++ b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>@@ -71,6 +71,8 @@</span><br><span>    { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },</span><br><span>   { X86_VENDOR_INTEL, CPUID_GLK_A0 },</span><br><span>  { X86_VENDOR_INTEL, CPUID_GLK_B0 },</span><br><span style="color: hsl(120, 100%, 40%);">+   { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 },</span><br><span style="color: hsl(120, 100%, 40%);">+   { X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 },</span><br><span>   { 0, 0 },</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>index 3057209..b639f49 100644</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>@@ -37,6 +37,8 @@</span><br><span> #define CPUID_APOLLOLAKE_E0     0x506ca</span><br><span> #define CPUID_GLK_A0         0x706a0</span><br><span> #define CPUID_GLK_B0         0x706a1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CPUID_WHISKEYLAKE_W0    0x806eb</span><br><span style="color: hsl(120, 100%, 40%);">+#define CPUID_COFFEELAKE_U0   0x906ea</span><br><span> </span><br><span> /*</span><br><span>  * MP Init callback function to Find CPU Topology. This function is common</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27258">change 27258</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27258"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Icb41763d20aa4c714ca09a57e59c02c3dce7ee52 </div>
<div style="display:none"> Gerrit-Change-Number: 27258 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>