<p>Angel Pons has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27211">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/gigabyte/ga-{h61m-s2pv,b75m-d3h,b75m-d3v}: Clean up mainboard code.<br><br>I ported ga-h61m-s2pv basing on the two Gigabyte b75m boards.<br>Based on another mainboard's code review comments, this patch<br>improves the code quality of these three similar boards.<br><br>ga-h61m-s2pv is tested and confirmed to be working, but I cannot<br>say the same regarding the other two mainboards as I do not have them.<br><br>Change-Id: Ib7747cceb5ba56f791677204cdc4c54c129c70c3<br>Signed-off-by: Angel Pons <th3fanbus@gmail.com><br>---<br>M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig<br>D src/mainboard/gigabyte/ga-b75m-d3h/acpi/video.asl<br>M src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c<br>M src/mainboard/gigabyte/ga-b75m-d3h/cmos.default<br>M src/mainboard/gigabyte/ga-b75m-d3h/cmos.layout<br>M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb<br>M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl<br>M src/mainboard/gigabyte/ga-b75m-d3h/hda_verb.c<br>M src/mainboard/gigabyte/ga-b75m-d3h/mainboard.c<br>M src/mainboard/gigabyte/ga-b75m-d3h/romstage.c<br>M src/mainboard/gigabyte/ga-b75m-d3v/Kconfig<br>D src/mainboard/gigabyte/ga-b75m-d3v/acpi/video.asl<br>M src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c<br>M src/mainboard/gigabyte/ga-b75m-d3v/cmos.default<br>M src/mainboard/gigabyte/ga-b75m-d3v/cmos.layout<br>M src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb<br>M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl<br>M src/mainboard/gigabyte/ga-b75m-d3v/hda_verb.c<br>M src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c<br>M src/mainboard/gigabyte/ga-b75m-d3v/romstage.c<br>M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig<br>M src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb<br>M src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl<br>M src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c<br>24 files changed, 52 insertions(+), 259 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/27211/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig</span><br><span>index 580a9ad..8c0f36b 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig</span><br><span>@@ -13,7 +13,6 @@</span><br><span>   select HAVE_OPTION_TABLE</span><br><span>     select HAVE_CMOS_DEFAULT</span><br><span>     select HAVE_ACPI_RESUME</span><br><span style="color: hsl(0, 100%, 40%);">- select HAVE_SMI_HANDLER</span><br><span>      select INTEL_INT15</span><br><span>   select SERIRQ_CONTINUOUS_MODE</span><br><span>        select MAINBOARD_HAS_LIBGFXINIT</span><br><span>@@ -23,10 +22,6 @@</span><br><span>         int</span><br><span>  default 25</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config USBDEBUG_HCD_INDEX</span><br><span style="color: hsl(0, 100%, 40%);">- int</span><br><span style="color: hsl(0, 100%, 40%);">-     default 2</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAINBOARD_DIR</span><br><span>    string</span><br><span>       default gigabyte/ga-b75m-d3h</span><br><span>@@ -47,14 +42,6 @@</span><br><span>    string</span><br><span>       default "pci8086,0162.rom"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_IFD_BIN</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_ME_BIN</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config IFD_BIOS_SECTION</span><br><span>         string</span><br><span>       default "0x00600000:0x007fffff"</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/video.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/video.asl</span><br><span>deleted file mode 100644</span><br><span>index f87af3c..0000000</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/video.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-// Blank</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c</span><br><span>index 2d7b43f..5c09059 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c</span><br><span>@@ -35,8 +35,5 @@</span><br><span>        gnvs->s5u0 = 0;</span><br><span>   gnvs->s5u1 = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  // the lid is open by default.</span><br><span style="color: hsl(0, 100%, 40%);">-  gnvs->lids = 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>   acpi_update_thermal_table(gnvs);</span><br><span> }</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/cmos.default b/src/mainboard/gigabyte/ga-b75m-d3h/cmos.default</span><br><span>index a313f68..6f3cec7 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/cmos.default</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/cmos.default</span><br><span>@@ -1,7 +1,6 @@</span><br><span> boot_option=Fallback</span><br><span style="color: hsl(0, 100%, 40%);">-debug_level=Spew</span><br><span style="color: hsl(120, 100%, 40%);">+debug_level=Debug</span><br><span> power_on_after_fail=Enable</span><br><span> nmi=Enable</span><br><span style="color: hsl(0, 100%, 40%);">-volume=0x3</span><br><span> sata_mode=AHCI</span><br><span style="color: hsl(0, 100%, 40%);">-hyper_threading=Enable</span><br><span style="color: hsl(120, 100%, 40%);">+gfx_uma_size=32M</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/cmos.layout b/src/mainboard/gigabyte/ga-b75m-d3h/cmos.layout</span><br><span>index 7c72c4b..80950cd 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/cmos.layout</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/cmos.layout</span><br><span>@@ -52,18 +52,15 @@</span><br><span> 395          4       e       6        debug_level</span><br><span> #399          1       r       0        unused</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-400          8       h       0        volume</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> # coreboot config options: southbridge</span><br><span> 408          1       e       1        nmi</span><br><span> 409          2       e       7        power_on_after_fail</span><br><span> </span><br><span> #411       10       r       0        unused</span><br><span> 421         1       e       9        sata_mode</span><br><span style="color: hsl(0, 100%, 40%);">-#422           2       r       0        unused</span><br><span style="color: hsl(120, 100%, 40%);">+#422        2       r       0        unused</span><br><span> </span><br><span> # coreboot config options: cpu</span><br><span style="color: hsl(0, 100%, 40%);">-424          1       e       2        hyper_threading</span><br><span> #425        7       r       0        unused</span><br><span> </span><br><span> # coreboot config options: northbridge</span><br><span>@@ -85,8 +82,6 @@</span><br><span> #ID value   text</span><br><span> 1     0     Disable</span><br><span> 1     1     Enable</span><br><span style="color: hsl(0, 100%, 40%);">-2     0     Enable</span><br><span style="color: hsl(0, 100%, 40%);">-2     1     Disable</span><br><span> 4     0     Fallback</span><br><span> 4     1     Normal</span><br><span> 6     0     Emergency</span><br><span>@@ -114,4 +109,4 @@</span><br><span> # -----------------------------------------------------------------</span><br><span> checksums</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-checksum 392 415 984</span><br><span style="color: hsl(120, 100%, 40%);">+checksum 392 439 984</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb</span><br><span>index 3659354..b0c58f9 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb</span><br><span>@@ -1,7 +1,7 @@</span><br><span> chip northbridge/intel/sandybridge</span><br><span>       # IGD Displays</span><br><span>       register "gfx.ndid" = "3"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"</span><br><span style="color: hsl(120, 100%, 40%);">+     register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"</span><br><span> </span><br><span>        device cpu_cluster 0 on</span><br><span>              chip cpu/intel/socket_LGA1155</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl</span><br><span>index c7052d8..665d81b 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl</span><br><span>@@ -25,16 +25,15 @@</span><br><span>         // Some generic macros</span><br><span>       #include "acpi/platform.asl"</span><br><span>       #include <cpu/intel/model_206ax/acpi/cpu.asl></span><br><span style="color: hsl(0, 100%, 40%);">-     /* global NVS and variables.  */</span><br><span style="color: hsl(120, 100%, 40%);">+      /* global NVS and variables. */</span><br><span>      #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl></span><br><span>        #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl></span><br><span> </span><br><span>  Scope (\_SB) {</span><br><span>               Device (PCI0)</span><br><span>                {</span><br><span style="color: hsl(0, 100%, 40%);">-               #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(0, 100%, 40%);">-             #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(120, 100%, 40%);">+                       #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(120, 100%, 40%);">+                   #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span>                      #include <drivers/intel/gma/acpi/default_brightness_levels.asl></span><br><span>                }</span><br><span>    }</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/hda_verb.c b/src/mainboard/gigabyte/ga-b75m-d3h/hda_verb.c</span><br><span>index 71d40cb..23cd570 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/hda_verb.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/hda_verb.c</span><br><span>@@ -14,8 +14,9 @@</span><br><span> #include <device/azalia_device.h></span><br><span> </span><br><span> const u32 cim_verb_data[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+        /* FIXME: Add configuration for sound */</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-const u32 pc_beep_verbs[0] = {};</span><br><span style="color: hsl(120, 100%, 40%);">+const u32 pc_beep_verbs[] = {};</span><br><span> </span><br><span> AZALIA_ARRAY_SIZES;</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/mainboard.c b/src/mainboard/gigabyte/ga-b75m-d3h/mainboard.c</span><br><span>index 90131ff..4e8d9f5 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/mainboard.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/mainboard.c</span><br><span>@@ -15,22 +15,9 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <types.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <string.h></span><br><span> #include <device/device.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_ops.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span> #include <drivers/intel/gma/int15.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <pc80/mc146818rtc.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/interrupt.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <boot/coreboot_tables.h></span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <smbios.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbfs.h></span><br><span> </span><br><span> static void mainboard_init(struct device *dev)</span><br><span> {</span><br><span>@@ -75,7 +62,9 @@</span><br><span> {</span><br><span>  dev->ops->init = mainboard_init;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-      install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_CRT, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+       install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,</span><br><span style="color: hsl(120, 100%, 40%);">+                                    GMA_INT15_PANEL_FIT_DEFAULT,</span><br><span style="color: hsl(120, 100%, 40%);">+                                  GMA_INT15_BOOT_DISPLAY_CRT, 0);</span><br><span> }</span><br><span> </span><br><span> struct chip_operations mainboard_ops = {</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>index 5a2c935..6c4fa1e 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>@@ -13,30 +13,21 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <northbridge/intel/sandybridge/raminit_native.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <northbridge/intel/sandybridge/sandybridge.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/common/ite.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/it8728f/it8728f.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define SUPERIO_BASE 0x2e</span><br><span> #define SUPERIO_DEV PNP_DEV(SUPERIO_BASE, 0)</span><br><span> #define SUPERIO_GPIO PNP_DEV(SUPERIO_BASE, IT8728F_GPIO)</span><br><span> #define SERIAL_DEV PNP_DEV(SUPERIO_BASE, 0x01)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pnp_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <superio/ite/it8728f/it8728f.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <superio/ite/common/ite.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <northbridge/intel/sandybridge/sandybridge.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <northbridge/intel/sandybridge/raminit_native.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <southbridge/intel/common/gpio.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void it8728f_b75md3h_disable_reboot(pnp_devfn_t dev)</span><br><span> {</span><br><span>      /* GPIO SIO settings */</span><br><span style="color: hsl(0, 100%, 40%);">- ite_reg_write(dev, 0xEF, 0x7E); // magic</span><br><span style="color: hsl(120, 100%, 40%);">+      ite_reg_write(dev, 0xEF, 0x7E); // magic SIO disable reboot</span><br><span> </span><br><span>      ite_reg_write(dev, 0x25, 0x40); // gpio pin function -> gp16</span><br><span>      ite_reg_write(dev, 0x27, 0x10); // gpio pin function -> gp34</span><br><span>@@ -48,7 +39,7 @@</span><br><span>  ite_reg_write(dev, 0xe9, 0x27); // bus select disable</span><br><span>        ite_reg_write(dev, 0xf0, 0x10); // ?</span><br><span>         ite_reg_write(dev, 0xf1, 0x42); // ?</span><br><span style="color: hsl(0, 100%, 40%);">-    ite_reg_write(dev, 0xf6, 0x1c); // hardware monitor alert beep -> gp36(pin12)</span><br><span style="color: hsl(120, 100%, 40%);">+      ite_reg_write(dev, 0xf6, 0x1c); // hwmon alert beep -> gp36(pin12)</span><br><span> </span><br><span>    /* EC SIO settings */</span><br><span>        ite_reg_write(IT8728F_EC, 0xf1, 0xc0);</span><br><span>@@ -63,88 +54,13 @@</span><br><span> </span><br><span> void mainboard_rcba_config(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">-     pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1);</span><br><span style="color: hsl(0, 100%, 40%);">-    pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE + 4, 0);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x44, 0x80);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     outw (inw (DEFAULT_PMBASE | 0x003c) | 2, DEFAULT_PMBASE | 0x003c);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      RCBA32(0x3500) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3504) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3508) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x350c) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3510) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3514) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3518) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x351c) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3520) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3524) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3528) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x352c) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3530) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3534) = 0x2000035f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3560) = 0x024c8001;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3564) = 0x000024a3;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3568) = 0x00040002;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x356c) = 0x01000050;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3570) = 0x02000662;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3574) = 0x18000f9f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3578) = 0x1800ff4f;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x357c) = 0x0001d530;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x35a0) = 0xc0300c03;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x35a4) = 0x00241803;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    pci_write_config32 (PCI_DEV (0, 0x14, 0), 0xe4, 0x00000000);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    outw (0x0000, DEFAULT_PMBASE | 0x003c);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- RCBA32(0x2240) = 0x00330e71;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2244) = 0x003f0eb1;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2248) = 0x002102cd;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x224c) = 0x00f60000;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2250) = 0x00020000;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2254) = 0x00e3004c;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2258) = 0x00e20bef;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2260) = 0x003304ed;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2278) = 0x001107c1;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x227c) = 0x001d07e9;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2280) = 0x00e20000;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2284) = 0x00ee0000;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2288) = 0x005b05d3;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x2318) = 0x04b8ff2e;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x231c) = 0x03930f2e;</span><br><span style="color: hsl(0, 100%, 40%);">-//  RCBA32(0x3418) = 0x1fee1fe1;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3808) = 0x005044a3;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3810) = 0x52410000;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3814) = 0x0000008a;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3818) = 0x00000006;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x381c) = 0x0000072e;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3820) = 0x0000000a;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3824) = 0x00000123;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3828) = 0x00000009;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x382c) = 0x00000001;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3834) = 0x0000061a;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3838) = 0x00000003;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x383c) = 0x00000a76;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3840) = 0x00000004;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3844) = 0x0000e5e4;</span><br><span style="color: hsl(0, 100%, 40%);">-    RCBA32(0x3848) = 0x0000000e;</span><br><span style="color: hsl(0, 100%, 40%);">-*/</span><br><span>       /* Enable HECI */</span><br><span>    RCBA32(FD2) &= ~0x2;</span><br><span> }</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-     /*</span><br><span style="color: hsl(0, 100%, 40%);">-       * Enable:</span><br><span style="color: hsl(0, 100%, 40%);">-       *  EC Decode Range PortA30/A20</span><br><span style="color: hsl(0, 100%, 40%);">-  *  SuperIO Port2E/2F</span><br><span style="color: hsl(0, 100%, 40%);">-    *  PS/2 Keyboard/Mouse Port60/64</span><br><span style="color: hsl(0, 100%, 40%);">-        *  FDD Port3F0h-3F5h and Port3F7h</span><br><span style="color: hsl(0, 100%, 40%);">-       */</span><br><span style="color: hsl(0, 100%, 40%);">-     pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN |</span><br><span style="color: hsl(120, 100%, 40%);">+      pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN |</span><br><span>                         CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);</span><br><span> </span><br><span>        pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x3c0a01);</span><br><span>@@ -181,28 +97,6 @@</span><br><span>       read_spd (&spd[3], 0x53, id_only);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#if 0</span><br><span style="color: hsl(0, 100%, 40%);">-static void dmi_config(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-       DMIBAR32(0x0218) = 0x06aa0b0c;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x021c) = 0x0b0d0b0d;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0300) = 0x0011028d;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0304) = 0x002102cd;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x030c) = 0x007d004b;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0310) = 0x007e004c;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0318) = 0x002304ad;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x031c) = 0x003304ed;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x03b8) = 0x005c05a4;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x03bc) = 0x006c05e4;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0530) = 0x41d3b000;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0534) = 0x00019f80;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0ba4) = 0x0000000d;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0d80) = 0x1c9cfc0b;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0e1c) = 0x20000000;</span><br><span style="color: hsl(0, 100%, 40%);">-  DMIBAR32(0x0e2c) = 0x20000000;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void mainboard_early_init(int s3resume) {</span><br><span> }</span><br><span> </span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig</span><br><span>index b8694f5..2c0bb18 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig</span><br><span>@@ -22,10 +22,6 @@</span><br><span>        int</span><br><span>  default 25</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config USBDEBUG_HCD_INDEX</span><br><span style="color: hsl(0, 100%, 40%);">- int</span><br><span style="color: hsl(0, 100%, 40%);">-     default 2</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAINBOARD_DIR</span><br><span>    string</span><br><span>       default gigabyte/ga-b75m-d3v</span><br><span>@@ -46,14 +42,6 @@</span><br><span>    string</span><br><span>       default "pci8086,0102.rom"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_IFD_BIN</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_ME_BIN</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config IFD_BIOS_SECTION</span><br><span>         string</span><br><span>       default "0x00600000:0x007fffff"</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/acpi/video.asl b/src/mainboard/gigabyte/ga-b75m-d3v/acpi/video.asl</span><br><span>deleted file mode 100644</span><br><span>index f87af3c..0000000</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/acpi/video.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-// Blank</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c b/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c</span><br><span>index 2d7b43f..5c09059 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c</span><br><span>@@ -35,8 +35,5 @@</span><br><span>        gnvs->s5u0 = 0;</span><br><span>   gnvs->s5u1 = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  // the lid is open by default.</span><br><span style="color: hsl(0, 100%, 40%);">-  gnvs->lids = 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>   acpi_update_thermal_table(gnvs);</span><br><span> }</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/cmos.default b/src/mainboard/gigabyte/ga-b75m-d3v/cmos.default</span><br><span>index a313f68..6f3cec7 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/cmos.default</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/cmos.default</span><br><span>@@ -1,7 +1,6 @@</span><br><span> boot_option=Fallback</span><br><span style="color: hsl(0, 100%, 40%);">-debug_level=Spew</span><br><span style="color: hsl(120, 100%, 40%);">+debug_level=Debug</span><br><span> power_on_after_fail=Enable</span><br><span> nmi=Enable</span><br><span style="color: hsl(0, 100%, 40%);">-volume=0x3</span><br><span> sata_mode=AHCI</span><br><span style="color: hsl(0, 100%, 40%);">-hyper_threading=Enable</span><br><span style="color: hsl(120, 100%, 40%);">+gfx_uma_size=32M</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/cmos.layout b/src/mainboard/gigabyte/ga-b75m-d3v/cmos.layout</span><br><span>index 7c72c4b..80950cd 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/cmos.layout</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/cmos.layout</span><br><span>@@ -52,18 +52,15 @@</span><br><span> 395          4       e       6        debug_level</span><br><span> #399          1       r       0        unused</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-400          8       h       0        volume</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> # coreboot config options: southbridge</span><br><span> 408          1       e       1        nmi</span><br><span> 409          2       e       7        power_on_after_fail</span><br><span> </span><br><span> #411       10       r       0        unused</span><br><span> 421         1       e       9        sata_mode</span><br><span style="color: hsl(0, 100%, 40%);">-#422           2       r       0        unused</span><br><span style="color: hsl(120, 100%, 40%);">+#422        2       r       0        unused</span><br><span> </span><br><span> # coreboot config options: cpu</span><br><span style="color: hsl(0, 100%, 40%);">-424          1       e       2        hyper_threading</span><br><span> #425        7       r       0        unused</span><br><span> </span><br><span> # coreboot config options: northbridge</span><br><span>@@ -85,8 +82,6 @@</span><br><span> #ID value   text</span><br><span> 1     0     Disable</span><br><span> 1     1     Enable</span><br><span style="color: hsl(0, 100%, 40%);">-2     0     Enable</span><br><span style="color: hsl(0, 100%, 40%);">-2     1     Disable</span><br><span> 4     0     Fallback</span><br><span> 4     1     Normal</span><br><span> 6     0     Emergency</span><br><span>@@ -114,4 +109,4 @@</span><br><span> # -----------------------------------------------------------------</span><br><span> checksums</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-checksum 392 415 984</span><br><span style="color: hsl(120, 100%, 40%);">+checksum 392 439 984</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb</span><br><span>index 618943c..d7153f4 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb</span><br><span>@@ -1,6 +1,6 @@</span><br><span> chip northbridge/intel/sandybridge</span><br><span>       register "gfx.ndid" = "3"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"</span><br><span style="color: hsl(120, 100%, 40%);">+     register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"</span><br><span> </span><br><span>        device cpu_cluster 0 on</span><br><span>              chip cpu/intel/socket_LGA1155</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl</span><br><span>index c7052d8..665d81b 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl</span><br><span>@@ -25,16 +25,15 @@</span><br><span>         // Some generic macros</span><br><span>       #include "acpi/platform.asl"</span><br><span>       #include <cpu/intel/model_206ax/acpi/cpu.asl></span><br><span style="color: hsl(0, 100%, 40%);">-     /* global NVS and variables.  */</span><br><span style="color: hsl(120, 100%, 40%);">+      /* global NVS and variables. */</span><br><span>      #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl></span><br><span>        #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl></span><br><span> </span><br><span>  Scope (\_SB) {</span><br><span>               Device (PCI0)</span><br><span>                {</span><br><span style="color: hsl(0, 100%, 40%);">-               #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(0, 100%, 40%);">-             #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(120, 100%, 40%);">+                       #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(120, 100%, 40%);">+                   #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span>                      #include <drivers/intel/gma/acpi/default_brightness_levels.asl></span><br><span>                }</span><br><span>    }</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/hda_verb.c b/src/mainboard/gigabyte/ga-b75m-d3v/hda_verb.c</span><br><span>index 887eb51..3ae6b5d 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/hda_verb.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/hda_verb.c</span><br><span>@@ -36,6 +36,6 @@</span><br><span>       AZALIA_PIN_CFG(0, 0x1f, 0x411111f0)</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-const u32 pc_beep_verbs[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(120, 100%, 40%);">+const u32 pc_beep_verbs[] = {};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> AZALIA_ARRAY_SIZES;</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c b/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c</span><br><span>index 90131ff..4e8d9f5 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c</span><br><span>@@ -15,22 +15,9 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <types.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <string.h></span><br><span> #include <device/device.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_ops.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span> #include <drivers/intel/gma/int15.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <pc80/mc146818rtc.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/interrupt.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <boot/coreboot_tables.h></span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <smbios.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbfs.h></span><br><span> </span><br><span> static void mainboard_init(struct device *dev)</span><br><span> {</span><br><span>@@ -75,7 +62,9 @@</span><br><span> {</span><br><span>  dev->ops->init = mainboard_init;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-      install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_CRT, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+       install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,</span><br><span style="color: hsl(120, 100%, 40%);">+                                    GMA_INT15_PANEL_FIT_DEFAULT,</span><br><span style="color: hsl(120, 100%, 40%);">+                                  GMA_INT15_BOOT_DISPLAY_CRT, 0);</span><br><span> }</span><br><span> </span><br><span> struct chip_operations mainboard_ops = {</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>index a389e68..64c323b 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>@@ -13,30 +13,21 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <northbridge/intel/sandybridge/raminit_native.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <northbridge/intel/sandybridge/sandybridge.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/common/ite.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/it8728f/it8728f.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define SUPERIO_BASE 0x2e</span><br><span> #define SUPERIO_DEV PNP_DEV(SUPERIO_BASE, 0)</span><br><span> #define SUPERIO_GPIO PNP_DEV(SUPERIO_BASE, IT8728F_GPIO)</span><br><span> #define SERIAL_DEV PNP_DEV(SUPERIO_BASE, 0x01)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pnp_def.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <superio/ite/it8728f/it8728f.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <superio/ite/common/ite.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <northbridge/intel/sandybridge/sandybridge.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <northbridge/intel/sandybridge/raminit_native.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <southbridge/intel/bd82x6x/pch.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <southbridge/intel/common/gpio.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void it8728f_b75md3v_disable_reboot(pnp_devfn_t dev)</span><br><span> {</span><br><span>      /* GPIO SIO settings */</span><br><span style="color: hsl(0, 100%, 40%);">- ite_reg_write(dev, 0xEF, 0x7E); // magic</span><br><span style="color: hsl(120, 100%, 40%);">+      ite_reg_write(dev, 0xEF, 0x7E); // magic SIO disable reboot</span><br><span> </span><br><span>      ite_reg_write(dev, 0x25, 0x40); // gpio pin function -> gp16</span><br><span>      ite_reg_write(dev, 0x27, 0x10); // gpio pin function -> gp34</span><br><span>@@ -48,7 +39,7 @@</span><br><span>  ite_reg_write(dev, 0xe9, 0x27); // bus select disable</span><br><span>        ite_reg_write(dev, 0xf0, 0x10); // ?</span><br><span>         ite_reg_write(dev, 0xf1, 0x42); // ?</span><br><span style="color: hsl(0, 100%, 40%);">-    ite_reg_write(dev, 0xf6, 0x1c); // hardware monitor alert beep -> gp36(pin12)</span><br><span style="color: hsl(120, 100%, 40%);">+      ite_reg_write(dev, 0xf6, 0x1c); // hwmon alert beep -> gp36(pin12)</span><br><span> </span><br><span>    /* EC SIO settings */</span><br><span>        ite_reg_write(IT8728F_EC, 0xf1, 0xc0);</span><br><span>@@ -69,14 +60,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       /*</span><br><span style="color: hsl(0, 100%, 40%);">-       * Enable:</span><br><span style="color: hsl(0, 100%, 40%);">-       *  EC Decode Range PortA30/A20</span><br><span style="color: hsl(0, 100%, 40%);">-  *  SuperIO Port2E/2F</span><br><span style="color: hsl(0, 100%, 40%);">-    *  PS/2 Keyboard/Mouse Port60/64</span><br><span style="color: hsl(0, 100%, 40%);">-        *  FDD Port3F0h-3F5h and Port3F7h</span><br><span style="color: hsl(0, 100%, 40%);">-       */</span><br><span style="color: hsl(0, 100%, 40%);">-     pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN |</span><br><span style="color: hsl(120, 100%, 40%);">+      pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN |</span><br><span>                         CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);</span><br><span> </span><br><span>        pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x3c0a01);</span><br><span>@@ -106,6 +90,7 @@</span><br><span>        { 1, 5, 6 },</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* FIXME: This board only has two DIMM slots! */</span><br><span> void mainboard_get_spd(spd_raw_data *spd, bool id_only) {</span><br><span>        read_spd (&spd[0], 0x50, id_only);</span><br><span>       read_spd (&spd[1], 0x51, id_only);</span><br><span>diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig</span><br><span>index f53bc06..6e395b3 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig</span><br><span>+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig</span><br><span>@@ -32,14 +32,6 @@</span><br><span>         select HAVE_OPTION_TABLE</span><br><span>     select HAVE_CMOS_DEFAULT</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_IFD_BIN</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config HAVE_ME_BIN</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAINBOARD_DIR</span><br><span>    string</span><br><span>       default "gigabyte/ga-h61m-s2pv"</span><br><span>@@ -68,8 +60,4 @@</span><br><span>        int</span><br><span>  default 8</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config USBDEBUG_HCD_INDEX # FIXME: check this</span><br><span style="color: hsl(0, 100%, 40%);">-      int</span><br><span style="color: hsl(0, 100%, 40%);">-     default 2</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> endif # BOARD_GIGABYTE_GA_H61M_S2PV</span><br><span>diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb</span><br><span>index 9102b82..7ff7fbe 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb</span><br><span>+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb</span><br><span>@@ -14,14 +14,8 @@</span><br><span> ##</span><br><span> </span><br><span> chip northbridge/intel/sandybridge</span><br><span style="color: hsl(0, 100%, 40%);">-  register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"</span><br><span style="color: hsl(0, 100%, 40%);">-       register "gfx.link_frequency_270_mhz" = "0"</span><br><span>      register "gfx.ndid" = "3"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gfx.use_spread_spectrum_clock" = "0"</span><br><span style="color: hsl(0, 100%, 40%);">-      register "gpu_dp_b_hotplug" = "4"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gpu_dp_c_hotplug" = "4"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gpu_dp_d_hotplug" = "4"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "gpu_panel_port_select" = "0"</span><br><span style="color: hsl(120, 100%, 40%);">+    register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"</span><br><span>    device cpu_cluster 0x0 on</span><br><span>            chip cpu/intel/socket_LGA1155</span><br><span>                        device lapic 0x0 on</span><br><span>diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl</span><br><span>index d5719cc..71d238d 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl</span><br><span>+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl</span><br><span>@@ -38,9 +38,9 @@</span><br><span>         Scope (\_SB) {</span><br><span>               Device (PCI0)</span><br><span>                {</span><br><span style="color: hsl(0, 100%, 40%);">-               #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(0, 100%, 40%);">-             #include <drivers/intel/gma/acpi/default_brightness_levels.asl></span><br><span style="color: hsl(0, 100%, 40%);">-           #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span style="color: hsl(120, 100%, 40%);">+                       #include <northbridge/intel/sandybridge/acpi/sandybridge.asl></span><br><span style="color: hsl(120, 100%, 40%);">+                   #include <drivers/intel/gma/acpi/default_brightness_levels.asl></span><br><span style="color: hsl(120, 100%, 40%);">+                 #include <southbridge/intel/bd82x6x/acpi/pch.asl></span><br><span>              }</span><br><span>    }</span><br><span> }</span><br><span>diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c</span><br><span>index 3e63721..f1cd176 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c</span><br><span>@@ -57,11 +57,11 @@</span><br><span> </span><br><span> void mainboard_config_superio(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       /* Enable serial port and flip some magic bits */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(120, 100%, 40%);">+     /* Enable serial port */</span><br><span>     ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-   ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E); // magic</span><br><span style="color: hsl(120, 100%, 40%);">+     /* Disable SIO WDT which kicks in DualBIOS */</span><br><span style="color: hsl(120, 100%, 40%);">+ ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E);</span><br><span> }</span><br><span> </span><br><span> void mainboard_get_spd(spd_raw_data *spd, bool id_only)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27211">change 27211</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27211"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib7747cceb5ba56f791677204cdc4c54c129c70c3 </div>
<div style="display:none"> Gerrit-Change-Number: 27211 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> </div>