<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27176">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Remove DMA support for PTT<br><br>Alternative buffer communication support for PTT is no longer<br>needed for CNL onwards and coreboot no need to reserve additional<br>4KiB memory for PTT support.<br><br>Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/cannonlake/include/soc/iomap.h<br>M src/soc/intel/cannonlake/memmap.c<br>2 files changed, 0 insertions(+), 23 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/27176/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h</span><br><span>index 2a3608c..75f11c0 100644</span><br><span>--- a/src/soc/intel/cannonlake/include/soc/iomap.h</span><br><span>+++ b/src/soc/intel/cannonlake/include/soc/iomap.h</span><br><span>@@ -65,10 +65,6 @@</span><br><span> </span><br><span> #define HECI1_BASE_ADDRESS 0xfeda2000</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* PTT registers */</span><br><span style="color: hsl(0, 100%, 40%);">-#define PTT_TXT_BASE_ADDRESS 0xfed30800</span><br><span style="color: hsl(0, 100%, 40%);">-#define PTT_PRESENT 0x00070000</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define VTD_BASE_ADDRESS 0xFED90000</span><br><span> #define VTD_BASE_SIZE 0x00004000</span><br><span> /*</span><br><span>diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c</span><br><span>index 108a1b0..64e07be 100644</span><br><span>--- a/src/soc/intel/cannonlake/memmap.c</span><br><span>+++ b/src/soc/intel/cannonlake/memmap.c</span><br><span>@@ -83,22 +83,6 @@</span><br><span> return 0;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static bool is_ptt_enable(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- if ((read32((void *)PTT_TXT_BASE_ADDRESS) & PTT_PRESENT) ==</span><br><span style="color: hsl(0, 100%, 40%);">- PTT_PRESENT)</span><br><span style="color: hsl(0, 100%, 40%);">- return true;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Calculate PTT size */</span><br><span style="color: hsl(0, 100%, 40%);">-static size_t get_ptt_size(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* Allocate 4KB for PTT if enabled */</span><br><span style="color: hsl(0, 100%, 40%);">- return is_ptt_enable() ? 4*KiB : 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* Calculate ME Stolen size */</span><br><span> static size_t get_imr_size(void)</span><br><span> {</span><br><span>@@ -192,9 +176,6 @@</span><br><span> /* Get Tracehub size */</span><br><span> reserve_mem_base -= get_imr_size();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Get PTT size */</span><br><span style="color: hsl(0, 100%, 40%);">- reserve_mem_base -= get_ptt_size();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* Traditional Area Size */</span><br><span> reserve_mem_size = dram_base - reserve_mem_base;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27176">change 27176</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27176"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90 </div>
<div style="display:none"> Gerrit-Change-Number: 27176 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>