<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27162">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge/southbridge.c: Fix get_index_bit limit check<br><br>Limit is the maximum number of bits to be tested, however it's being checked<br>against the number of bytes of uint32_t. when it should be number of bits.<br>Create a macro to provide the number of bits, and use it instead of sizeof.<br><br>BUG=b:75996437<br>TEST=Add debug messages to see code passing beyond the check, build and<br>boot grunt, check that it passed the limit check, remove debug code.<br><br>Change-Id: Id1dfda26d789183b346b20c37fec923d996b80db<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/include/soc/southbridge.h<br>M src/soc/amd/stoneyridge/southbridge.c<br>2 files changed, 2 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/27162/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>index 1750547..b0f0c55 100644</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>@@ -355,6 +355,7 @@</span><br><span> </span><br><span> #define PM1_LIMIT                    16</span><br><span> #define GPE0_LIMIT                        28</span><br><span style="color: hsl(120, 100%, 40%);">+#define TOTAL_BITS(a)                       (8 * sizeof(a))</span><br><span> </span><br><span> struct stoneyridge_aoac {</span><br><span>     int enable;</span><br><span>diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>index 02daa260..24462f2 100644</span><br><span>--- a/src/soc/amd/stoneyridge/southbridge.c</span><br><span>+++ b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>@@ -697,7 +697,7 @@</span><br><span>  uint16_t i;</span><br><span>  uint32_t t;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (limit >= sizeof(uint32_t))</span><br><span style="color: hsl(120, 100%, 40%);">+     if (limit >= TOTAL_BITS(uint32_t))</span><br><span>                return -1;</span><br><span> </span><br><span>       /* get a mask of valid bits. Ex limit = 3, set bits 0-2 */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27162">change 27162</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27162"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id1dfda26d789183b346b20c37fec923d996b80db </div>
<div style="display:none"> Gerrit-Change-Number: 27162 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>