<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27036">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src: Get rid of device_t<br><br>Use of device_t is deprecated.<br><br>Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c<br>M src/soc/intel/broadwell/pmutil.c<br>M src/southbridge/intel/bd82x6x/early_pch_common.c<br>M src/southbridge/intel/bd82x6x/early_usb_mrc.c<br>M src/southbridge/intel/bd82x6x/pch.c<br>M src/southbridge/intel/common/spi.c<br>M src/southbridge/intel/lynxpoint/pmutil.c<br>7 files changed, 32 insertions(+), 28 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/27036/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c</span><br><span>index 4100b26..bbb1d11 100644</span><br><span>--- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c</span><br><span>+++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c</span><br><span>@@ -70,9 +70,9 @@</span><br><span> if (is_fam15h()) {</span><br><span> uint32_t dword;</span><br><span> #ifdef __PRE_RAM__</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span> #endif</span><br><span> </span><br><span> /* Select DCT */</span><br><span>@@ -92,9 +92,9 @@</span><br><span> if (is_fam15h()) {</span><br><span> uint32_t dword;</span><br><span> #ifdef __PRE_RAM__</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span> #endif</span><br><span> </span><br><span> /* Select DCT */</span><br><span>@@ -129,9 +129,9 @@</span><br><span> if (is_fam15h()) {</span><br><span> uint32_t dword;</span><br><span> #ifdef __PRE_RAM__</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span> #endif</span><br><span> </span><br><span> /* Select DCT */</span><br><span>@@ -247,9 +247,9 @@</span><br><span> return (((uint64_t)msr.hi) << 32) | ((uint64_t)msr.lo);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static uint32_t read_config32_dct_nbpstate(device_t dev, uint8_t node, uint8_t dct, uint8_t nb_pstate, uint32_t reg) {</span><br><span style="color: hsl(120, 100%, 40%);">+static uint32_t read_config32_dct_nbpstate(struct device *dev, uint8_t node, uint8_t dct, uint8_t nb_pstate, uint32_t reg) {</span><br><span> uint32_t dword;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span> </span><br><span> /* Select DCT */</span><br><span> dword = pci_read_config32(dev_fn1, 0x10c);</span><br><span>@@ -312,9 +312,9 @@</span><br><span> </span><br><span> /* Load data from DCTs into data structure */</span><br><span> for (node = 0; node < MAX_NODES_SUPPORTED; node++) {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn2 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 2));</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn3 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 3));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn2 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 2));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_fn3 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 3));</span><br><span> /* Test for node presence */</span><br><span> if ((!dev_fn1) || (pci_read_config32(dev_fn1, PCI_VENDOR_ID) == 0xffffffff)) {</span><br><span> persistent_data->node[node].node_present = 0;</span><br><span>@@ -524,9 +524,10 @@</span><br><span> }</span><br><span> }</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">-static void write_config32_dct_nbpstate(device_t dev, uint8_t node, uint8_t dct, uint8_t nb_pstate, uint32_t reg, uint32_t value) {</span><br><span style="color: hsl(120, 100%, 40%);">+static void write_config32_dct_nbpstate(pci_devfn_t dev, uint8_t node, uint8_t dct, uint8_t nb_pstate, uint32_t reg, uint32_t value)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span> uint32_t dword;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span> </span><br><span> /* Select DCT */</span><br><span> dword = pci_read_config32(dev_fn1, 0x10c);</span><br><span>@@ -543,7 +544,7 @@</span><br><span> pci_write_config32(dev, reg, value);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void write_amd_dct_index_register(device_t dev, uint32_t index_ctl_reg, uint32_t index, uint32_t value)</span><br><span style="color: hsl(120, 100%, 40%);">+static void write_amd_dct_index_register(pci_devfn_t dev, uint32_t index_ctl_reg, uint32_t index, uint32_t value)</span><br><span> {</span><br><span> uint32_t dword;</span><br><span> </span><br><span>@@ -555,11 +556,11 @@</span><br><span> } while (!(dword & (1 << 31)));</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void write_amd_dct_index_register_dct(device_t dev, uint8_t node, uint8_t dct, uint32_t index_ctl_reg, uint32_t index, uint32_t value)</span><br><span style="color: hsl(120, 100%, 40%);">+static void write_amd_dct_index_register_dct(pci_devfn_t dev, uint8_t node, uint8_t dct, uint32_t index_ctl_reg, uint32_t index, uint32_t value)</span><br><span> {</span><br><span> if (is_fam15h()) {</span><br><span> uint32_t dword;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1);</span><br><span> </span><br><span> /* Select DCT */</span><br><span> dword = pci_read_config32(dev_fn1, 0x10c);</span><br><span>diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c</span><br><span>index 25624cc..3899130 100644</span><br><span>--- a/src/soc/intel/broadwell/pmutil.c</span><br><span>+++ b/src/soc/intel/broadwell/pmutil.c</span><br><span>@@ -452,7 +452,11 @@</span><br><span> {</span><br><span> u8 reg8;</span><br><span> int rtc_failed;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCH_DEV_LPC;</span><br><span style="color: hsl(120, 100%, 40%);">+#if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev = PCH_DEV_LPC;</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCH_DEV_LPC;</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> </span><br><span> reg8 = pci_read_config8(dev, GEN_PMCON_3);</span><br><span> rtc_failed = reg8 & RTC_BATTERY_DEAD;</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/early_pch_common.c b/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>index 2ef47a2..f1ac4f0 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>@@ -66,9 +66,9 @@</span><br><span> int rtc_failure(void)</span><br><span> {</span><br><span> #if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(0, 0x1f, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span> #endif</span><br><span> return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);</span><br><span> }</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c</span><br><span>index 8fac3c7..4b9061e 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c</span><br><span>@@ -32,8 +32,8 @@</span><br><span> */</span><br><span> void enable_usb_bar(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t usb0 = PCH_EHCI1_DEV;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t usb1 = PCH_EHCI2_DEV;</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t usb0 = PCH_EHCI1_DEV;</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t usb1 = PCH_EHCI2_DEV;</span><br><span> u32 cmd;</span><br><span> </span><br><span> /* USB Controller 1 */</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c</span><br><span>index 73c84bb..7ff13a0 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/pch.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/pch.c</span><br><span>@@ -36,7 +36,7 @@</span><br><span> pci_devfn_t dev;</span><br><span> dev = PCI_DEV(0, 0x1f, 0);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span> #endif</span><br><span> </span><br><span>@@ -53,7 +53,7 @@</span><br><span> pci_devfn_t dev;</span><br><span> dev = PCI_DEV(0, 0x1f, 0);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span> #endif</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c</span><br><span>index bd89025..180a629 100644</span><br><span>--- a/src/southbridge/intel/common/spi.c</span><br><span>+++ b/src/southbridge/intel/common/spi.c</span><br><span>@@ -298,15 +298,14 @@</span><br><span> uint8_t *rcrb; /* Root Complex Register Block */</span><br><span> uint32_t rcba; /* Root Complex Base Address */</span><br><span> uint8_t bios_cntl;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span> ich9_spi_regs *ich9_spi;</span><br><span> ich7_spi_regs *ich7_spi;</span><br><span> uint16_t hsfs;</span><br><span> </span><br><span> #ifdef __SIMPLE_DEVICE__</span><br><span style="color: hsl(0, 100%, 40%);">- dev = PCI_DEV(0, 31, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev = PCI_DEV(0, 31, 0);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span> #endif</span><br><span> </span><br><span> pci_read_config_dword(dev, 0xf0, &rcba);</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>index 00a6e65..e96d683 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>@@ -558,9 +558,9 @@</span><br><span> int rtc_failure(void)</span><br><span> {</span><br><span> #if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(0, 31, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_devfn_t dev = PCI_DEV(0, 31, 0);</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span> #endif</span><br><span> return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27036">change 27036</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f </div>
<div style="display:none"> Gerrit-Change-Number: 27036 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>