<p>Tristan Hsieh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27024">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mediatek: Refactor to sharing watchdog timer code among similar SOCs<br><br>This patch refactor watchdog timer(WDT) code which will be reused among<br>similar SOCs.<br><br>BUG=b:80501386<br>BRANCH=none<br>TEST=the refactored code works fine on the new platform (with the rest<br>     of the patches applied) and Elm platform<br><br>Change-Id: I745c2f204924d9eee1941c0f3e9b6ba45cfb1958<br>Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com><br>---<br>M src/soc/mediatek/mt8173/include/soc/wdt.h<br>M src/soc/mediatek/mt8173/wdt.c<br>2 files changed, 8 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/27024/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/mediatek/mt8173/include/soc/wdt.h b/src/soc/mediatek/mt8173/include/soc/wdt.h</span><br><span>index 9ebed64..ddca102 100644</span><br><span>--- a/src/soc/mediatek/mt8173/include/soc/wdt.h</span><br><span>+++ b/src/soc/mediatek/mt8173/include/soc/wdt.h</span><br><span>@@ -13,12 +13,12 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef SOC_MEDIATEK_MT8173_WDT_H</span><br><span style="color: hsl(0, 100%, 40%);">-#define SOC_MEDIATEK_MT8173_WDT_H</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef SOC_MEDIATEK_COMMON_WDT_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define SOC_MEDIATEK_COMMON_WDT_H</span><br><span> </span><br><span> #include <stdint.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-struct mt8173_wdt_regs {</span><br><span style="color: hsl(120, 100%, 40%);">+struct mtk_wdt_regs {</span><br><span>    u32 wdt_mode;</span><br><span>        u32 wdt_length;</span><br><span>      u32 wdt_restart;</span><br><span>@@ -50,4 +50,4 @@</span><br><span> </span><br><span> int mtk_wdt_init(void);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* SOC_MEDIATEK_MT8173_WDT_H */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* SOC_MEDIATEK_COMMON_WDT_H */</span><br><span>diff --git a/src/soc/mediatek/mt8173/wdt.c b/src/soc/mediatek/mt8173/wdt.c</span><br><span>index 85fdbf5..bd2a614 100644</span><br><span>--- a/src/soc/mediatek/mt8173/wdt.c</span><br><span>+++ b/src/soc/mediatek/mt8173/wdt.c</span><br><span>@@ -20,14 +20,14 @@</span><br><span> #include <soc/wdt.h></span><br><span> #include <vendorcode/google/chromeos/chromeos.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static struct mt8173_wdt_regs *const mt8173_wdt = (void *)RGU_BASE;</span><br><span style="color: hsl(120, 100%, 40%);">+static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;</span><br><span> </span><br><span> int mtk_wdt_init(void)</span><br><span> {</span><br><span>        uint32_t wdt_sta;</span><br><span> </span><br><span>        /* Write Mode register will clear status register */</span><br><span style="color: hsl(0, 100%, 40%);">-    wdt_sta = read32(&mt8173_wdt->wdt_status);</span><br><span style="color: hsl(120, 100%, 40%);">+     wdt_sta = read32(&mtk_wdt->wdt_status);</span><br><span> </span><br><span>   printk(BIOS_INFO, "WDT: Last reset was ");</span><br><span>         if (wdt_sta & MTK_WDT_STA_HW_RST) {</span><br><span>@@ -49,7 +49,7 @@</span><br><span>   * ENABLE: disable watchdog on initialization.</span><br><span>        * Setting bit EXTEN to enable watchdog output.</span><br><span>       */</span><br><span style="color: hsl(0, 100%, 40%);">-     clrsetbits_le32(&mt8173_wdt->wdt_mode,</span><br><span style="color: hsl(120, 100%, 40%);">+ clrsetbits_le32(&mtk_wdt->wdt_mode,</span><br><span>                   MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ |</span><br><span>                  MTK_WDT_MODE_EXT_POL | MTK_WDT_MODE_ENABLE,</span><br><span>                  MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY);</span><br><span>@@ -59,5 +59,5 @@</span><br><span> </span><br><span> void do_hard_reset(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-        write32(&mt8173_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);</span><br><span style="color: hsl(120, 100%, 40%);">+    write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27024">change 27024</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27024"/><meta i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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I745c2f204924d9eee1941c0f3e9b6ba45cfb1958 </div>
<div style="display:none"> Gerrit-Change-Number: 27024 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com> </div>