<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27042">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common/rcba_pirq.c: Use common RCBA acces MACROs<br><br>Change-Id: I2fe8d8388cb96e42af4f9be251a41cceeb2e4710<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/southbridge/intel/common/rcba_pirq.c<br>M src/southbridge/intel/common/rcba_pirq.h<br>2 files changed, 1 insertion(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/27042/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/common/rcba_pirq.c b/src/southbridge/intel/common/rcba_pirq.c</span><br><span>index 7f97971..366fe08 100644</span><br><span>--- a/src/southbridge/intel/common/rcba_pirq.c</span><br><span>+++ b/src/southbridge/intel/common/rcba_pirq.c</span><br><span>@@ -18,6 +18,7 @@</span><br><span> #include <device/pci.h></span><br><span> #include <southbridge/intel/common/acpi_pirq_gen.h></span><br><span> #include <southbridge/intel/common/rcba_pirq.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/rcba.h></span><br><span> </span><br><span> #define MAX_SLOT 31</span><br><span> #define MIN_SLOT 19</span><br><span>diff --git a/src/southbridge/intel/common/rcba_pirq.h b/src/southbridge/intel/common/rcba_pirq.h</span><br><span>index cf76fb3..e5ac409 100644</span><br><span>--- a/src/southbridge/intel/common/rcba_pirq.h</span><br><span>+++ b/src/southbridge/intel/common/rcba_pirq.h</span><br><span>@@ -37,8 +37,4 @@</span><br><span> #define D20IR         0x3160  /* 16bit */</span><br><span> #define D19IR            0x3168  /* 16bit */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define DEFAULT_RCBA     0xfed1c000</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + (x))))</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #endif /* SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ_H */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27042">change 27042</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27042"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2fe8d8388cb96e42af4f9be251a41cceeb2e4710 </div>
<div style="display:none"> Gerrit-Change-Number: 27042 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>