<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26883">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/haswell: Always locate mrc.bin in the COREBOOT fmap region<br><br>This binary needs to be at a specific offset and will therefore always<br>be located in the COREBOOT fmap region.<br><br>This will be useful with C_ENVIRONMENT_BOOTBLOCK where romstages in<br>FW_MAIN_x will still need the same binary.<br><br>Change-Id: Ia73d468ab23932f92331ef40b8e8066cef55af2c<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/haswell/Kconfig<br>M src/northbridge/intel/haswell/raminit.c<br>2 files changed, 16 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/26883/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig</span><br><span>index 3a47195..692744b 100644</span><br><span>--- a/src/northbridge/intel/haswell/Kconfig</span><br><span>+++ b/src/northbridge/intel/haswell/Kconfig</span><br><span>@@ -84,4 +84,9 @@</span><br><span>           VBIOS. On those systems we need to wait for a bit before executing</span><br><span>           the VBIOS.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config RO_REGION_ONLY</span><br><span style="color: hsl(120, 100%, 40%);">+       string</span><br><span style="color: hsl(120, 100%, 40%);">+        depends on CHROMEOS</span><br><span style="color: hsl(120, 100%, 40%);">+   default "mrc.bin"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> endif</span><br><span>diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c</span><br><span>index e5e2b93..cdbb1a9 100644</span><br><span>--- a/src/northbridge/intel/haswell/raminit.c</span><br><span>+++ b/src/northbridge/intel/haswell/raminit.c</span><br><span>@@ -120,6 +120,9 @@</span><br><span> void sdram_initialize(struct pei_data *pei_data)</span><br><span> {</span><br><span>       unsigned long entry;</span><br><span style="color: hsl(120, 100%, 40%);">+  uint32_t type = CBFS_TYPE_MRC;</span><br><span style="color: hsl(120, 100%, 40%);">+        struct cbfsf f;</span><br><span style="color: hsl(120, 100%, 40%);">+       size_t fsize;</span><br><span> </span><br><span>    printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n");</span><br><span> </span><br><span>@@ -142,9 +145,14 @@</span><br><span>         /* Pass console handler in pei_data */</span><br><span>       pei_data->tx_byte = do_putchar;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  /* Locate and call UEFI System Agent binary. */</span><br><span style="color: hsl(0, 100%, 40%);">- entry = (unsigned long)cbfs_boot_map_with_leak("mrc.bin",</span><br><span style="color: hsl(0, 100%, 40%);">-                                                     CBFS_TYPE_MRC, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+     * Locate and call UEFI System Agent binary. The binary needs to be at</span><br><span style="color: hsl(120, 100%, 40%);">+         * a fixed offset in the flash and can therefore only reside in the</span><br><span style="color: hsl(120, 100%, 40%);">+    * COREBOOT fmap region</span><br><span style="color: hsl(120, 100%, 40%);">+        */</span><br><span style="color: hsl(120, 100%, 40%);">+   cbfs_locate_file_in_region(&f, "COREBOOT", "mrc.bin", &type);</span><br><span style="color: hsl(120, 100%, 40%);">+     fsize = region_device_sz(&f.data);</span><br><span style="color: hsl(120, 100%, 40%);">+        entry = (unsigned long)rdev_mmap(&f.data, 0, fsize);</span><br><span>     if (entry) {</span><br><span>                 int rv;</span><br><span>              asm volatile (</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26883">change 26883</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26883"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia73d468ab23932f92331ef40b8e8066cef55af2c </div>
<div style="display:none"> Gerrit-Change-Number: 26883 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>