<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/26625">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Patrick Georgi: Looks good to me, approved
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/iei: Get rid of whitespace before tab<br><br>Change-Id: I750ec788b7526ee2a7aa803bffb93805cedfb2ff<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>Reviewed-on: https://review.coreboot.org/26625<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Patrick Georgi <pgeorgi@google.com><br>---<br>M src/mainboard/iei/kino-780am2-fam10/devicetree.cb<br>M src/mainboard/iei/kino-780am2-fam10/dsdt.asl<br>2 files changed, 21 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb</span><br><span>index 1dffb4b..6517c97 100644</span><br><span>--- a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb</span><br><span>+++ b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb</span><br><span>@@ -9,7 +9,7 @@</span><br><span> chip northbridge/amd/amdfam10</span><br><span> device pci 18.0 on # northbridge</span><br><span> chip southbridge/amd/rs780</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on end # HT 0x9600</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.0 on end # HT 0x9600</span><br><span> device pci 1.0 on end # Internal Graphics P2P bridge 0x9602</span><br><span> device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603</span><br><span> device pci 3.0 on end # PCIE P2P bridge 0x960b</span><br><span>@@ -39,7 +39,7 @@</span><br><span> device pci 13.0 on end # USB</span><br><span> device pci 13.1 on end # USB</span><br><span> device pci 13.2 on end # USB</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 14.0 on # SM</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 14.0 on # SM</span><br><span> chip drivers/generic/generic #dimm 0-0-0</span><br><span> device i2c 50 on end</span><br><span> end</span><br><span>diff --git a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl</span><br><span>index 402b520..cd158fa 100644</span><br><span>--- a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl</span><br><span>+++ b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl</span><br><span>@@ -239,9 +239,9 @@</span><br><span> PWMK, 1,</span><br><span> PWNS, 1,</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Offset(0x61), */ /* Options_1 */</span><br><span style="color: hsl(0, 100%, 40%);">- /* ,7, */</span><br><span style="color: hsl(0, 100%, 40%);">- /* R617,1, */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Offset(0x61), */ /* Options_1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* ,7, */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* R617,1, */</span><br><span> </span><br><span> Offset(0x65), /* UsbPMControl */</span><br><span> , 4,</span><br><span>@@ -837,7 +837,7 @@</span><br><span> </span><br><span> /* On older chips, clear PciExpWakeDisEn */</span><br><span> /*if (LLessEqual(\_SB.SBRI, 0x13)) {</span><br><span style="color: hsl(0, 100%, 40%);">- * Store(0,\_SB.PWDE)</span><br><span style="color: hsl(120, 100%, 40%);">+ * Store(0,\_SB.PWDE)</span><br><span> *}</span><br><span> */</span><br><span> </span><br><span>@@ -853,13 +853,13 @@</span><br><span> * used, so it could be removed.</span><br><span> *</span><br><span> *</span><br><span style="color: hsl(0, 100%, 40%);">- * \_GTS OEM Going To Sleep method</span><br><span style="color: hsl(120, 100%, 40%);">+ * \_GTS OEM Going To Sleep method</span><br><span> *</span><br><span style="color: hsl(0, 100%, 40%);">- * Entry:</span><br><span style="color: hsl(0, 100%, 40%);">- * Arg0=The value of the sleeping state S1=1, S2=2</span><br><span style="color: hsl(120, 100%, 40%);">+ * Entry:</span><br><span style="color: hsl(120, 100%, 40%);">+ * Arg0=The value of the sleeping state S1=1, S2=2</span><br><span> *</span><br><span style="color: hsl(0, 100%, 40%);">- * Exit:</span><br><span style="color: hsl(0, 100%, 40%);">- * -none-</span><br><span style="color: hsl(120, 100%, 40%);">+ * Exit:</span><br><span style="color: hsl(120, 100%, 40%);">+ * -none-</span><br><span> *</span><br><span> * Method(\_GTS, 1) {</span><br><span> * DBGO("\\_GTS\n")</span><br><span>@@ -1026,7 +1026,7 @@</span><br><span> </span><br><span> /* PCIe HotPlug event */</span><br><span> /* Method(_L0F) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L0F\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L0F\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span>@@ -1049,19 +1049,19 @@</span><br><span> </span><br><span> /* GPM0 SCI event - Moved to USB.asl */</span><br><span> /* Method(_L13) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L13\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L13\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span> /* GPM1 SCI event - Moved to USB.asl */</span><br><span> /* Method(_L14) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L14\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L14\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span> /* GPM2 SCI event - Moved to USB.asl */</span><br><span> /* Method(_L15) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L15\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L15\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span>@@ -1073,7 +1073,7 @@</span><br><span> </span><br><span> /* GPM8 SCI event - Moved to USB.asl */</span><br><span> /* Method(_L17) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L17\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L17\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span>@@ -1090,7 +1090,7 @@</span><br><span> </span><br><span> /* GPM4 SCI event - Moved to USB.asl */</span><br><span> /* Method(_L19) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L19\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L19\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span>@@ -1121,7 +1121,7 @@</span><br><span> </span><br><span> /* GPIO2 or GPIO66 SCI event */</span><br><span> /* Method(_L1E) {</span><br><span style="color: hsl(0, 100%, 40%);">- * DBGO("\\_GPE\\_L1E\n")</span><br><span style="color: hsl(120, 100%, 40%);">+ * DBGO("\\_GPE\\_L1E\n")</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span>@@ -1131,7 +1131,7 @@</span><br><span> * }</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- } /* End Scope GPE */</span><br><span style="color: hsl(120, 100%, 40%);">+ } /* End Scope GPE */</span><br><span> </span><br><span> #include "acpi/usb.asl"</span><br><span> </span><br><span>@@ -1520,7 +1520,7 @@</span><br><span> 0xF300 /* length */</span><br><span> )</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */</span><br><span style="color: hsl(120, 100%, 40%);">+ Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */</span><br><span> #if 0</span><br><span> Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)</span><br><span> Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */</span><br><span>@@ -1652,7 +1652,7 @@</span><br><span> </span><br><span> /* On older chips, clear PciExpWakeDisEn */</span><br><span> /*if (LLessEqual(\SBRI, 0x13)) {</span><br><span style="color: hsl(0, 100%, 40%);">- * Store(0,\PWDE)</span><br><span style="color: hsl(120, 100%, 40%);">+ * Store(0,\PWDE)</span><br><span> * }</span><br><span> */</span><br><span> } /* End Method(_SB._INI) */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26625">change 26625</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: merged </div>
<div style="display:none"> Gerrit-Change-Id: I750ec788b7526ee2a7aa803bffb93805cedfb2ff </div>
<div style="display:none"> Gerrit-Change-Number: 26625 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>