<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26769">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">include/cpu/intel: Remove unneeded includes<br><br>Change-Id: Iba1347a2b9ef99f9751b2a4e375ad9503bd53a56<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/include/cpu/intel/microcode.h<br>M src/include/cpu/intel/romstage.h<br>M src/include/cpu/intel/speedstep.h<br>3 files changed, 0 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/26769/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/include/cpu/intel/microcode.h b/src/include/cpu/intel/microcode.h</span><br><span>index 0783ace..f94bee4 100644</span><br><span>--- a/src/include/cpu/intel/microcode.h</span><br><span>+++ b/src/include/cpu/intel/microcode.h</span><br><span>@@ -16,8 +16,6 @@</span><br><span> #ifndef __CPU__INTEL__MICROCODE__</span><br><span> #define __CPU__INTEL__MICROCODE__</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdint.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void intel_update_microcode_from_cbfs(void);</span><br><span> /* Find a microcode that matches the revision and platform family returning</span><br><span>  * NULL if none found. */</span><br><span>diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h</span><br><span>index 3a9e989..394132d 100644</span><br><span>--- a/src/include/cpu/intel/romstage.h</span><br><span>+++ b/src/include/cpu/intel/romstage.h</span><br><span>@@ -1,8 +1,6 @@</span><br><span> #ifndef _CPU_INTEL_ROMSTAGE_H</span><br><span> #define _CPU_INTEL_ROMSTAGE_H</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void mainboard_romstage_entry(unsigned long bist);</span><br><span> </span><br><span> /* romstage_main is called from the cache-as-ram assembly file. The return</span><br><span>diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h</span><br><span>index 4b556b7..7189c52 100644</span><br><span>--- a/src/include/cpu/intel/speedstep.h</span><br><span>+++ b/src/include/cpu/intel/speedstep.h</span><br><span>@@ -18,8 +18,6 @@</span><br><span> #ifndef CPU_INTEL_SPEEDSTEP_H</span><br><span> #define CPU_INTEL_SPEEDSTEP_H</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdint.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* Magic value used to locate speedstep configuration in the device tree */</span><br><span> #define SPEEDSTEP_APIC_MAGIC 0xACAC</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26769">change 26769</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26769"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iba1347a2b9ef99f9751b2a4e375ad9503bd53a56 </div>
<div style="display:none"> Gerrit-Change-Number: 26769 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>