<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26733">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/mainboard: Remove unneeded MSR header<br><br>Change-Id: I3d4549ac9d5693c59d28d063255db376b4394e57<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/amd/lamar/mainboard.c<br>M src/mainboard/apple/macbookair4_2/early_southbridge.c<br>M src/mainboard/bap/ode_e21XX/mainboard.c<br>M src/mainboard/gigabyte/ga-b75m-d3h/romstage.c<br>M src/mainboard/gigabyte/ga-b75m-d3v/romstage.c<br>M src/mainboard/google/butterfly/romstage.c<br>M src/mainboard/google/link/i915.c<br>M src/mainboard/google/link/romstage.c<br>M src/mainboard/google/parrot/romstage.c<br>M src/mainboard/google/stout/romstage.c<br>M src/mainboard/intel/cougar_canyon2/romstage.c<br>M src/mainboard/intel/emeraldlake2/romstage.c<br>M src/mainboard/intel/harcuvar/acpi_tables.c<br>M src/mainboard/intel/stargo2/romstage.c<br>M src/mainboard/jetway/pa78vm5/mainboard.c<br>M src/mainboard/kontron/ktqm77/romstage.c<br>M src/mainboard/lenovo/s230u/romstage.c<br>M src/mainboard/lenovo/t400/romstage.c<br>M src/mainboard/lenovo/t520/romstage.c<br>M src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c<br>M src/mainboard/lenovo/x1_carbon_gen1/romstage.c<br>M src/mainboard/lenovo/x200/romstage.c<br>M src/mainboard/lenovo/x220/romstage.c<br>M src/mainboard/lenovo/x230/romstage.c<br>M src/mainboard/roda/rk9/romstage.c<br>M src/mainboard/samsung/lumpy/romstage.c<br>M src/mainboard/samsung/stumpy/romstage.c<br>M src/mainboard/sapphire/pureplatinumh61/romstage.c<br>M src/mainboard/scaleway/tagada/acpi_tables.c<br>29 files changed, 0 insertions(+), 29 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/26733/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/amd/lamar/mainboard.c b/src/mainboard/amd/lamar/mainboard.c</span><br><span>index 94e680b..706ea9f 100644</span><br><span>--- a/src/mainboard/amd/lamar/mainboard.c</span><br><span>+++ b/src/mainboard/amd/lamar/mainboard.c</span><br><span>@@ -19,7 +19,6 @@</span><br><span> #include <arch/io.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/amd/mtrr.h></span><br><span> #include <northbridge/amd/pi/00630F01/pci_devs.h></span><br><span> #include <southbridge/amd/pi/hudson/amd_pci_int_defs.h></span><br><span>diff --git a/src/mainboard/apple/macbookair4_2/early_southbridge.c b/src/mainboard/apple/macbookair4_2/early_southbridge.c</span><br><span>index 25ddb98..6d2cbd1 100644</span><br><span>--- a/src/mainboard/apple/macbookair4_2/early_southbridge.c</span><br><span>+++ b/src/mainboard/apple/macbookair4_2/early_southbridge.c</span><br><span>@@ -28,7 +28,6 @@</span><br><span> #include <southbridge/intel/common/rcba.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cbfs.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span>diff --git a/src/mainboard/bap/ode_e21XX/mainboard.c b/src/mainboard/bap/ode_e21XX/mainboard.c</span><br><span>index 1e8d723..e537f25 100644</span><br><span>--- a/src/mainboard/bap/ode_e21XX/mainboard.c</span><br><span>+++ b/src/mainboard/bap/ode_e21XX/mainboard.c</span><br><span>@@ -19,7 +19,6 @@</span><br><span> #include <arch/io.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/amd/mtrr.h></span><br><span> </span><br><span> /**********************************************</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>index 92bef28..858d08e 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c</span><br><span>@@ -32,7 +32,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> static void it8728f_b75md3h_disable_reboot(pnp_devfn_t dev)</span><br><span> {</span><br><span>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>index 283ad46..ae22309 100644</span><br><span>--- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c</span><br><span>@@ -32,7 +32,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> static void it8728f_b75md3v_disable_reboot(pnp_devfn_t dev)</span><br><span> {</span><br><span>diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c</span><br><span>index ebcba84..88ae638 100644</span><br><span>--- a/src/mainboard/google/butterfly/romstage.c</span><br><span>+++ b/src/mainboard/google/butterfly/romstage.c</span><br><span>@@ -33,7 +33,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #if IS_ENABLED(CONFIG_CHROMEOS)</span><br><span> #include <vendorcode/google/chromeos/chromeos.h></span><br><span>diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c</span><br><span>index 9ab3149..2e228a9 100644</span><br><span>--- a/src/mainboard/google/link/i915.c</span><br><span>+++ b/src/mainboard/google/link/i915.c</span><br><span>@@ -38,7 +38,6 @@</span><br><span> #include <cpu/x86/tsc.h></span><br><span> #include <cpu/x86/cache.h></span><br><span> #include <cpu/x86/mtrr.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <edid.h></span><br><span> #include "i915io.h"</span><br><span> </span><br><span>diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c</span><br><span>index a1bbe34..a6630cf 100644</span><br><span>--- a/src/mainboard/google/link/romstage.c</span><br><span>+++ b/src/mainboard/google/link/romstage.c</span><br><span>@@ -34,7 +34,6 @@</span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include "ec/google/chromeec/ec.h"</span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include <security/tpm/tis.h></span><br><span> #include <cbfs.h></span><br><span>diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c</span><br><span>index 12c1114..dfcd6e3 100644</span><br><span>--- a/src/mainboard/google/parrot/romstage.c</span><br><span>+++ b/src/mainboard/google/parrot/romstage.c</span><br><span>@@ -33,7 +33,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include <cbfs.h></span><br><span> #include <security/tpm/tis.h></span><br><span>diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c</span><br><span>index 4f7f869..70115e4 100644</span><br><span>--- a/src/mainboard/google/stout/romstage.c</span><br><span>+++ b/src/mainboard/google/stout/romstage.c</span><br><span>@@ -33,7 +33,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include <bootmode.h></span><br><span> #include <security/tpm/tis.h></span><br><span>diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c</span><br><span>index 96c22ea..c6a07d5 100644</span><br><span>--- a/src/mainboard/intel/cougar_canyon2/romstage.c</span><br><span>+++ b/src/mainboard/intel/cougar_canyon2/romstage.c</span><br><span>@@ -38,7 +38,6 @@</span><br><span> #include <southbridge/intel/fsp_bd82x6x/gpio.h></span><br><span> #include <southbridge/intel/fsp_bd82x6x/me.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include "gpio.h"</span><br><span> </span><br><span> #define SIO_PORT 0x164e</span><br><span>diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c</span><br><span>index 24c4b56..c2eab1f 100644</span><br><span>--- a/src/mainboard/intel/emeraldlake2/romstage.c</span><br><span>+++ b/src/mainboard/intel/emeraldlake2/romstage.c</span><br><span>@@ -34,7 +34,6 @@</span><br><span> #include <southbridge/intel/common/rcba.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include <security/tpm/tis.h></span><br><span> </span><br><span>diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c</span><br><span>index acbdb30..d6a5dbd 100644</span><br><span>--- a/src/mainboard/intel/harcuvar/acpi_tables.c</span><br><span>+++ b/src/mainboard/intel/harcuvar/acpi_tables.c</span><br><span>@@ -27,7 +27,6 @@</span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include <cpu/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> #include <soc/acpi.h></span><br><span> #include <soc/nvs.h></span><br><span>diff --git a/src/mainboard/intel/stargo2/romstage.c b/src/mainboard/intel/stargo2/romstage.c</span><br><span>index ff90e2e..9af714e 100644</span><br><span>--- a/src/mainboard/intel/stargo2/romstage.c</span><br><span>+++ b/src/mainboard/intel/stargo2/romstage.c</span><br><span>@@ -24,7 +24,6 @@</span><br><span> #include <device/pci_def.h></span><br><span> #include <device/pnp_def.h></span><br><span> #include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <pc80/mc146818rtc.h></span><br><span> #include <cbmem.h></span><br><span> #include <console/console.h></span><br><span>diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c</span><br><span>index ab305e3..1725338 100644</span><br><span>--- a/src/mainboard/jetway/pa78vm5/mainboard.c</span><br><span>+++ b/src/mainboard/jetway/pa78vm5/mainboard.c</span><br><span>@@ -18,7 +18,6 @@</span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/amd/mtrr.h></span><br><span> #include <device/pci_def.h></span><br><span> #include "southbridge/amd/sb700/sb700.h"</span><br><span>diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>index bff4991..eb1e806 100644</span><br><span>--- a/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>+++ b/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>@@ -33,7 +33,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span>diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c</span><br><span>index 83664f4..426bd42 100644</span><br><span>--- a/src/mainboard/lenovo/s230u/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/s230u/romstage.c</span><br><span>@@ -31,7 +31,6 @@</span><br><span> #include "southbridge/intel/bd82x6x/pch.h"</span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include "ec.h"</span><br><span> </span><br><span> #define SPD_LEN 256</span><br><span>diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c</span><br><span>index fd3544e..b1d5db6 100644</span><br><span>--- a/src/mainboard/lenovo/t400/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/t400/romstage.c</span><br><span>@@ -21,7 +21,6 @@</span><br><span> #include <arch/io.h></span><br><span> #include <arch/acpi.h></span><br><span> #include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/x86/tsc.h></span><br><span> #include <cpu/intel/romstage.h></span><br><span> #include <cbmem.h></span><br><span>diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c</span><br><span>index 638e7ca..8f17076 100644</span><br><span>--- a/src/mainboard/lenovo/t520/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/t520/romstage.c</span><br><span>@@ -34,7 +34,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cbfs.h></span><br><span> #include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h></span><br><span> #include <device/device.h></span><br><span>diff --git a/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c b/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c</span><br><span>index 2c148d4..420c4d6 100644</span><br><span>--- a/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c</span><br><span>+++ b/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c</span><br><span>@@ -25,7 +25,6 @@</span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include <cpu/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/bd82x6x/nvs.h></span><br><span>diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>index 029d867..3c8b8be 100644</span><br><span>--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>@@ -34,7 +34,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cbfs.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span>diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c</span><br><span>index 71de550..30f1119 100644</span><br><span>--- a/src/mainboard/lenovo/x200/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x200/romstage.c</span><br><span>@@ -21,7 +21,6 @@</span><br><span> #include <arch/io.h></span><br><span> #include <arch/acpi.h></span><br><span> #include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/x86/tsc.h></span><br><span> #include <cpu/intel/romstage.h></span><br><span> #include <cbmem.h></span><br><span>diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c</span><br><span>index e38dfe7..1a091d6 100644</span><br><span>--- a/src/mainboard/lenovo/x220/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x220/romstage.c</span><br><span>@@ -33,7 +33,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span>diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c</span><br><span>index 7801d57..4bea13c 100644</span><br><span>--- a/src/mainboard/lenovo/x230/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x230/romstage.c</span><br><span>@@ -34,7 +34,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cbfs.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span>diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c</span><br><span>index 65ff0f8..708eb5d 100644</span><br><span>--- a/src/mainboard/roda/rk9/romstage.c</span><br><span>+++ b/src/mainboard/roda/rk9/romstage.c</span><br><span>@@ -20,7 +20,6 @@</span><br><span> #include <string.h></span><br><span> #include <arch/io.h></span><br><span> #include <cpu/x86/lapic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <cpu/x86/tsc.h></span><br><span> #include <cpu/intel/romstage.h></span><br><span> #include <arch/acpi.h></span><br><span>diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c</span><br><span>index ce17068..c989662 100644</span><br><span>--- a/src/mainboard/samsung/lumpy/romstage.c</span><br><span>+++ b/src/mainboard/samsung/lumpy/romstage.c</span><br><span>@@ -36,7 +36,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include "option_table.h"</span><br><span> #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)</span><br><span>diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c</span><br><span>index 0da658c..3d6707c 100644</span><br><span>--- a/src/mainboard/samsung/stumpy/romstage.c</span><br><span>+++ b/src/mainboard/samsung/stumpy/romstage.c</span><br><span>@@ -36,7 +36,6 @@</span><br><span> #include <southbridge/intel/bd82x6x/pch.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span> #include <security/tpm/tis.h></span><br><span> #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)</span><br><span>diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c</span><br><span>index 420a956..ddcd46b 100644</span><br><span>--- a/src/mainboard/sapphire/pureplatinumh61/romstage.c</span><br><span>+++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c</span><br><span>@@ -31,7 +31,6 @@</span><br><span> #include "southbridge/intel/bd82x6x/pch.h"</span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span> #include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> #include <delay.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span>diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>index acbdb30..d6a5dbd 100644</span><br><span>--- a/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>+++ b/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>@@ -27,7 +27,6 @@</span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include <cpu/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span> </span><br><span> #include <soc/acpi.h></span><br><span> #include <soc/nvs.h></span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26733">change 26733</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26733"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3d4549ac9d5693c59d28d063255db376b4394e57 </div>
<div style="display:none"> Gerrit-Change-Number: 26733 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>