<p>Aamir Bohra has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26731">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/*/*: Update IOAPIC GPIO pad configuration to include trigger mode<br><br>Update GPIO pad configuartion in IOAPIC invert mode to include<br>RX level/edge Configuration.<br><br>Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85dab<br>Signed-off-by: Aamir Bohra <aamir.bohra@intel.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/gpio.c<br>M src/mainboard/google/octopus/variants/bip/gpio.c<br>M src/mainboard/google/reef/variants/baseboard/gpio.c<br>M src/mainboard/google/reef/variants/coral/gpio.c<br>M src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c<br>M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c<br>6 files changed, 27 insertions(+), 27 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/26731/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>index f839850..bf9bd7b 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>@@ -193,7 +193,7 @@</span><br><span> </span><br><span> // TODO Need to set HIZCRx1</span><br><span> PAD_CFG_GPI(GPIO_134, NONE, DEEP),/* GPIO_134 -- SD_CD_OD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP, LEVEL),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */</span><br><span> PAD_CFG_GPI(GPIO_138, NONE, DEEP),/* GPIO_138 -- PEN_PDCT_ODL */</span><br><span>diff --git a/src/mainboard/google/octopus/variants/bip/gpio.c b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>index 17fc105..231f942 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>@@ -191,7 +191,7 @@</span><br><span> </span><br><span> // TODO Need to set HIZCRx1</span><br><span> PAD_CFG_GPI(GPIO_134, NONE, DEEP),/* GPIO_134 -- SD_CD_OD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP, LEVEL),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */</span><br><span> PAD_CFG_GPI(GPIO_138, NONE, DEEP),/* GPIO_138 -- PEN_PDCT_ODL */</span><br><span>diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>index 3cd765b..110f257 100644</span><br><span>--- a/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>@@ -263,7 +263,7 @@</span><br><span> PAD_CFG_GPI(GPIO_112, UP_20K, DEEP), /* SIO_SPI_1_FS0 */</span><br><span> PAD_CFG_GPI(GPIO_113, UP_20K, DEEP), /* SIO_SPI_1_FS1 */</span><br><span> /* Headset interrupt */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_116, NONE, DEEP), /* SIO_SPI_1_RXD */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_116, NONE, DEEP, LEVEL), /* SIO_SPI_1_RXD */</span><br><span> PAD_CFG_GPI(GPIO_117, UP_20K, DEEP), /* SIO_SPI_1_TXD */</span><br><span> </span><br><span> /* SIO_SPI_2 -- unused */</span><br><span>@@ -286,31 +286,31 @@</span><br><span> PAD_CFG_GPI(GPIO_7, UP_20K, DEEP),</span><br><span> PAD_CFG_GPI(GPIO_8, UP_20K, DEEP),</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_9, NONE, DEEP), /* dTPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_9, NONE, DEEP, LEVEL), /* dTPM IRQ */</span><br><span> PAD_CFG_GPI(GPIO_10, DN_20K, DEEP), /* Board phase enforcement */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_11, NONE, DEEP, EDGE_SINGLE), /* EC SCI */</span><br><span> PAD_CFG_GPI(GPIO_12, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_13, NONE, DEEP), /* PEN_INT_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_13, NONE, DEEP, LEVEL), /* PEN_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_HIGH(GPIO_14, DN_20K, DEEP), /* FP_INT */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_15, NONE, DEEP, EDGE_SINGLE), /* TRACKPAD_INT_1V8_ODL */</span><br><span> PAD_CFG_GPI(GPIO_16, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* 1 vs 4 DMIC config */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_18, NONE, DEEP), /* Trackpad IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_18, NONE, DEEP, LEVEL), /* Trackpad IRQ */</span><br><span> PAD_CFG_GPI(GPIO_19, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP), /* NFC IRQ */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_21, NONE, DEEP), /* Touch IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP, LEVEL), /* NFC IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_21, NONE, DEEP, LEVEL), /* Touch IRQ */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_22, NONE, DEEP, EDGE_SINGLE), /* EC wake */</span><br><span> PAD_CFG_GPI(GPIO_23, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_24, NONE, DEEP), /* PEN_PDCT_ODL */</span><br><span> PAD_CFG_GPI(GPIO_25, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_26, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_27, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP), /* TPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP, LEVEL), /* TPM IRQ */</span><br><span> PAD_CFG_GPO(GPIO_29, 1, DEEP), /* FP reset */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_30, NONE, DEEP), /* KB IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_30, NONE, DEEP, LEVEL), /* KB IRQ */</span><br><span> PAD_CFG_GPO(GPIO_31, 0, DEEP), /* NFC FW DL */</span><br><span> PAD_CFG_NF(GPIO_32, NONE, DEEP, NF5), /* SUS_CLK2 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_33, NONE, DEEP), /* PMIC IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_33, NONE, DEEP, LEVEL), /* PMIC IRQ */</span><br><span> PAD_CFG_GPI(GPIO_34, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPO(GPIO_35, 0, DEEP), /* PEN_RESET - active high */</span><br><span> PAD_CFG_GPO(GPIO_36, 0, DEEP), /* touch reset */</span><br><span>@@ -358,7 +358,7 @@</span><br><span> /* I2C2 - TPM */</span><br><span> PAD_CFG_NF(GPIO_128, UP_2K, DEEP, NF1), /* LPSS_I2C2_SDA */</span><br><span> PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP), /* TPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP, LEVEL), /* TPM IRQ */</span><br><span> /* WLAN_PE_RST - default to deasserted just in case FSP misbehaves. */</span><br><span> PAD_CFG_GPO(GPIO_122, 0, DEEP), /* SIO_SPI_2_RXD */</span><br><span> };</span><br><span>@@ -373,7 +373,7 @@</span><br><span> /* GPIO settings before entering sleep. */</span><br><span> static const struct pad_config sleep_gpio_table[] = {</span><br><span> PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP, LEVEL), /* NFC_INT_L */</span><br><span> };</span><br><span> </span><br><span> const struct pad_config * __weak</span><br><span>diff --git a/src/mainboard/google/reef/variants/coral/gpio.c b/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>index e89e5b5..f97b66a 100644</span><br><span>--- a/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>+++ b/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>@@ -263,7 +263,7 @@</span><br><span> PAD_CFG_GPI(GPIO_112, UP_20K, DEEP), /* SIO_SPI_1_FS0 */</span><br><span> PAD_CFG_GPI(GPIO_113, UP_20K, DEEP), /* SIO_SPI_1_FS1 */</span><br><span> /* Headset interrupt */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_116, NONE, DEEP), /* SIO_SPI_1_RXD */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_116, NONE, DEEP, LEVEL), /* SIO_SPI_1_RXD */</span><br><span> PAD_CFG_GPI(GPIO_117, UP_20K, DEEP), /* SIO_SPI_1_TXD */</span><br><span> </span><br><span> /* SIO_SPI_2 -- unused */</span><br><span>@@ -286,31 +286,31 @@</span><br><span> PAD_CFG_GPI(GPIO_7, UP_20K, DEEP),</span><br><span> PAD_CFG_GPI(GPIO_8, UP_20K, DEEP),</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_9, NONE, DEEP), /* dTPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_9, NONE, DEEP, LEVEL), /* dTPM IRQ */</span><br><span> PAD_CFG_GPI(GPIO_10, DN_20K, DEEP), /* Board phase enforcement */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_11, NONE, DEEP, EDGE_SINGLE), /* EC SCI */</span><br><span> PAD_CFG_GPI(GPIO_12, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_13, NONE, DEEP), /* PEN_INT_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_13, NONE, DEEP, LEVEL), /* PEN_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_HIGH(GPIO_14, DN_20K, DEEP), /* FP_INT */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_15, NONE, DEEP, EDGE_SINGLE), /* TRACKPAD_INT_1V8_ODL */</span><br><span> PAD_CFG_GPI(GPIO_16, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* 1 vs 4 DMIC config */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_18, NONE, DEEP), /* Trackpad IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_18, NONE, DEEP, LEVEL), /* Trackpad IRQ */</span><br><span> PAD_CFG_GPI(GPIO_19, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP), /* NFC IRQ */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_21, NONE, DEEP), /* Touch IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP, LEVEL), /* NFC IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_21, NONE, DEEP, LEVEL), /* Touch IRQ */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_22, NONE, DEEP, EDGE_SINGLE), /* EC wake */</span><br><span> PAD_CFG_GPI(GPIO_23, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_24, NONE, DEEP), /* PEN_PDCT_ODL */</span><br><span> PAD_CFG_GPI(GPIO_25, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_26, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPI(GPIO_27, UP_20K, DEEP), /* unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP), /* TPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP, LEVEL), /* TPM IRQ */</span><br><span> PAD_CFG_GPO(GPIO_29, 1, DEEP), /* FP reset */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_30, NONE, DEEP), /* KB IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_30, NONE, DEEP, LEVEL), /* KB IRQ */</span><br><span> PAD_CFG_GPO(GPIO_31, 0, DEEP), /* NFC FW DL */</span><br><span> PAD_CFG_NF(GPIO_32, NONE, DEEP, NF5), /* SUS_CLK2 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_33, NONE, DEEP), /* PMIC IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_33, NONE, DEEP, LEVEL), /* PMIC IRQ */</span><br><span> PAD_CFG_GPI(GPIO_34, UP_20K, DEEP), /* unused */</span><br><span> PAD_CFG_GPO(GPIO_35, 0, DEEP), /* PEN_RESET - active high */</span><br><span> PAD_CFG_GPO(GPIO_36, 0, DEEP), /* touch reset */</span><br><span>@@ -358,7 +358,7 @@</span><br><span> /* I2C2 - TPM */</span><br><span> PAD_CFG_NF(GPIO_128, UP_2K, DEEP, NF1), /* LPSS_I2C2_SDA */</span><br><span> PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP), /* TPM IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP, LEVEL), /* TPM IRQ */</span><br><span> /* WLAN_PE_RST - default to deasserted just in case FSP misbehaves. */</span><br><span> PAD_CFG_GPO(GPIO_122, 0, DEEP), /* SIO_SPI_2_RXD */</span><br><span> };</span><br><span>@@ -372,14 +372,14 @@</span><br><span> /* Default GPIO settings before entering sleep. */</span><br><span> static const struct pad_config default_sleep_gpio_table[] = {</span><br><span> PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP, LEVEL), /* NFC_INT_L */</span><br><span> };</span><br><span> </span><br><span> /* GPIO settings before entering S5, which are same as default_sleep_gpio_table</span><br><span> * but also turn off EN_PP3300_DX_LTE_SOC. */</span><br><span> static const struct pad_config s5_sleep_gpio_table[] = {</span><br><span> PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP, LEVEL), /* NFC_INT_L */</span><br><span> PAD_CFG_GPO(GPIO_78, 0, DEEP), /* I2S1_SDO -- EN_PP3300_DX_LTE_SOC */</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c</span><br><span>index fa9d0e9..955126a 100644</span><br><span>--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c</span><br><span>@@ -50,7 +50,7 @@</span><br><span> /* A19 : ISH_GP_1 */</span><br><span> PAD_CFG_NF(GPP_A19, UP_20K, DEEP, NF1),</span><br><span> /* A20 : aduio codec irq */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPP_A20, NONE, DEEP),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPP_A20, NONE, DEEP, LEVEL),</span><br><span> /* A21 : ISH_GP_3 */</span><br><span> PAD_CFG_NF(GPP_A21, UP_20K, DEEP, NF1),</span><br><span> /* A22 : ISH_GP_4 */</span><br><span>diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c</span><br><span>index 7ff68a4..c763eca 100644</span><br><span>--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c</span><br><span>@@ -274,7 +274,7 @@</span><br><span> static const struct pad_config sleep_gpio_table[] = {</span><br><span> #if 0</span><br><span> PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP, LEVEL), /* NFC_INT_L */</span><br><span> #endif</span><br><span> };</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26731">change 26731</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85dab </div>
<div style="display:none"> Gerrit-Change-Number: 26731 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Aamir Bohra <aamir.bohra@intel.com> </div>