<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26704">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">arch/x86: Set the SIPI vector to a lower address<br><br>This allows for ROMCC_bootblocks that are larger than 4KiB.<br><br>Change-Id: I75a5e515bf5e7d0b8a496a882d20fe02cc30c253<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/arch/x86/failover.ld<br>M src/cpu/Kconfig<br>2 files changed, 3 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/26704/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/x86/failover.ld b/src/arch/x86/failover.ld</span><br><span>index e9613d9..2f844ad 100644</span><br><span>--- a/src/arch/x86/failover.ld</span><br><span>+++ b/src/arch/x86/failover.ld</span><br><span>@@ -28,7 +28,7 @@</span><br><span>      * boundary anyway, so no pad byte appears between _rom and _start.</span><br><span>   */</span><br><span>  .bogus ROMLOC_MIN : {</span><br><span style="color: hsl(0, 100%, 40%);">-           . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4);</span><br><span style="color: hsl(120, 100%, 40%);">+               . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(8192) : ALIGN(4);</span><br><span>              ROMLOC = .;</span><br><span>  } >rom = 0xff</span><br><span> </span><br><span>@@ -51,7 +51,7 @@</span><br><span>      * address gets applied.</span><br><span>      */</span><br><span>  ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -</span><br><span style="color: hsl(0, 100%, 40%);">-         (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);</span><br><span style="color: hsl(120, 100%, 40%);">+               (CONFIG_SIPI_VECTOR_IN_ROM ? 8192 : 0);</span><br><span> </span><br><span>  /* Post-check proper SIPI vector. */</span><br><span>         _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),</span><br><span>diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig</span><br><span>index e10a702..affa18c 100644</span><br><span>--- a/src/cpu/Kconfig</span><br><span>+++ b/src/cpu/Kconfig</span><br><span>@@ -44,7 +44,7 @@</span><br><span> </span><br><span> config AP_SIPI_VECTOR</span><br><span>      hex</span><br><span style="color: hsl(0, 100%, 40%);">-     default 0xfffff000</span><br><span style="color: hsl(120, 100%, 40%);">+    default 0xffffe000</span><br><span>   help</span><br><span>           This must equal address of ap_sipi_vector from bootblock build.</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26704">change 26704</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26704"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I75a5e515bf5e7d0b8a496a882d20fe02cc30c253 </div>
<div style="display:none"> Gerrit-Change-Number: 26704 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>