<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26712">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">cpu/intel/cache_as_ram: Compute number var MTRR's<br><br>Compute the number of variable MTRR's during runtime.<br><br>Change-Id: Ia4afdacc2d12db5ea49eb7ae2b4f4295981a6d8b<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/cpu/intel/car/cache_as_ram_ht.inc<br>M src/cpu/intel/haswell/cache_as_ram.inc<br>M src/cpu/intel/model_206ax/cache_as_ram.inc<br>M src/cpu/intel/model_6ex/cache_as_ram.inc<br>4 files changed, 156 insertions(+), 97 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/26712/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc</span><br><span>index e716caf..1497169 100644</span><br><span>--- a/src/cpu/intel/car/cache_as_ram_ht.inc</span><br><span>+++ b/src/cpu/intel/car/cache_as_ram_ht.inc</span><br><span>@@ -39,21 +39,32 @@</span><br><span> andl $LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR, %eax</span><br><span> jz ap_init</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Zero out all fixed range and variable range MTRRs.</span><br><span style="color: hsl(0, 100%, 40%);">- * For hyper-threaded CPUs these are shared.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- movl $mtrr_table, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- movl $((mtrr_table_end - mtrr_table) >> 1), %edi</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %eax, %eax</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %edx, %edx</span><br><span style="color: hsl(0, 100%, 40%);">-clear_mtrrs:</span><br><span style="color: hsl(0, 100%, 40%);">- movw (%esi), %bx</span><br><span style="color: hsl(0, 100%, 40%);">- movzx %bx, %ecx</span><br><span style="color: hsl(0, 100%, 40%);">- wrmsr</span><br><span style="color: hsl(0, 100%, 40%);">- add $2, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- dec %edi</span><br><span style="color: hsl(0, 100%, 40%);">- jnz clear_mtrrs</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Clear/disable fixed MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $fixed_mtrr_list_size, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+clear_fixed_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ add $-2, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ movzwl fixed_mtrr_list(%ebx), %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_fixed_mtrr</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Figure put how many MTRRs we have, and clear them out */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_CAP_MSR, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ rdmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ movzb %al, %ebx /* Number of variable MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_PHYS_BASE(0), %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_var_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ dec %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_var_mtrr</span><br><span> post_code(0x21)</span><br><span> </span><br><span> /* Configure the default memory type to uncacheable. */</span><br><span>@@ -452,15 +463,16 @@</span><br><span> hlt</span><br><span> jmp .Lhlt</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table:</span><br><span style="color: hsl(0, 100%, 40%);">- /* Fixed MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x250, 0x258, 0x259</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x268, 0x269, 0x26A</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26B, 0x26C, 0x26D</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26E, 0x26F</span><br><span style="color: hsl(0, 100%, 40%);">- /* Variable MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x200, 0x201, 0x202, 0x203</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x204, 0x205, 0x206, 0x207</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x208, 0x209, 0x20A, 0x20B</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x20C, 0x20D, 0x20E, 0x20F</span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table_end:</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list:</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_64K_00000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_80000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_A0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F8000</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list_size = . - fixed_mtrr_list</span><br><span>\ No newline at end of file</span><br><span>diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc</span><br><span>index 388c2ea..98bf3e3 100644</span><br><span>--- a/src/cpu/intel/haswell/cache_as_ram.inc</span><br><span>+++ b/src/cpu/intel/haswell/cache_as_ram.inc</span><br><span>@@ -52,18 +52,32 @@</span><br><span> jc wait_for_sipi</span><br><span> </span><br><span> post_code(0x21)</span><br><span style="color: hsl(0, 100%, 40%);">- /* Zero out all fixed range and variable range MTRRs. */</span><br><span style="color: hsl(0, 100%, 40%);">- movl $mtrr_table, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- movl $((mtrr_table_end - mtrr_table) >> 1), %edi</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %eax, %eax</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %edx, %edx</span><br><span style="color: hsl(0, 100%, 40%);">-clear_mtrrs:</span><br><span style="color: hsl(0, 100%, 40%);">- movw (%esi), %bx</span><br><span style="color: hsl(0, 100%, 40%);">- movzx %bx, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Clear/disable fixed MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $fixed_mtrr_list_size, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_fixed_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ add $-2, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ movzwl fixed_mtrr_list(%ebx), %ecx</span><br><span> wrmsr</span><br><span style="color: hsl(0, 100%, 40%);">- add $2, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- dec %edi</span><br><span style="color: hsl(0, 100%, 40%);">- jnz clear_mtrrs</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_fixed_mtrr</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Figure put how many MTRRs we have, and clear them out */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_CAP_MSR, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ rdmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ movzb %al, %ebx /* Number of variable MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_PHYS_BASE(0), %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_var_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ dec %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_var_mtrr</span><br><span> </span><br><span> post_code(0x22)</span><br><span> /* Configure the default memory type to uncacheable. */</span><br><span>@@ -282,16 +296,16 @@</span><br><span> hlt</span><br><span> jmp .Lhlt</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table:</span><br><span style="color: hsl(0, 100%, 40%);">- /* Fixed MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x250, 0x258, 0x259</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x268, 0x269, 0x26A</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26B, 0x26C, 0x26D</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26E, 0x26F</span><br><span style="color: hsl(0, 100%, 40%);">- /* Variable MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x200, 0x201, 0x202, 0x203</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x204, 0x205, 0x206, 0x207</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x208, 0x209, 0x20A, 0x20B</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x20C, 0x20D, 0x20E, 0x20F</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x210, 0x211, 0x212, 0x213</span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table_end:</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list:</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_64K_00000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_80000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_A0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F8000</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list_size = . - fixed_mtrr_list</span><br><span>\ No newline at end of file</span><br><span>diff --git a/src/cpu/intel/model_206ax/cache_as_ram.inc b/src/cpu/intel/model_206ax/cache_as_ram.inc</span><br><span>index d1678bf..92d2663 100644</span><br><span>--- a/src/cpu/intel/model_206ax/cache_as_ram.inc</span><br><span>+++ b/src/cpu/intel/model_206ax/cache_as_ram.inc</span><br><span>@@ -52,18 +52,33 @@</span><br><span> jc wait_for_sipi</span><br><span> </span><br><span> post_code(0x21)</span><br><span style="color: hsl(0, 100%, 40%);">- /* Zero out all fixed range and variable range MTRRs. */</span><br><span style="color: hsl(0, 100%, 40%);">- movl $mtrr_table, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- movl $((mtrr_table_end - mtrr_table) >> 1), %edi</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %eax, %eax</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %edx, %edx</span><br><span style="color: hsl(0, 100%, 40%);">-clear_mtrrs:</span><br><span style="color: hsl(0, 100%, 40%);">- movw (%esi), %bx</span><br><span style="color: hsl(0, 100%, 40%);">- movzx %bx, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Clear/disable fixed MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $fixed_mtrr_list_size, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_fixed_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ add $-2, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ movzwl fixed_mtrr_list(%ebx), %ecx</span><br><span> wrmsr</span><br><span style="color: hsl(0, 100%, 40%);">- add $2, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- dec %edi</span><br><span style="color: hsl(0, 100%, 40%);">- jnz clear_mtrrs</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_fixed_mtrr</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Figure put how many MTRRs we have, and clear them out */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_CAP_MSR, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ rdmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ movzb %al, %ebx /* Number of variable MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_PHYS_BASE(0), %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_var_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ dec %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_var_mtrr</span><br><span> </span><br><span> post_code(0x22)</span><br><span> /* Configure the default memory type to uncacheable. */</span><br><span>@@ -300,16 +315,16 @@</span><br><span> hlt</span><br><span> jmp .Lhlt</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table:</span><br><span style="color: hsl(0, 100%, 40%);">- /* Fixed MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x250, 0x258, 0x259</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x268, 0x269, 0x26A</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26B, 0x26C, 0x26D</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26E, 0x26F</span><br><span style="color: hsl(0, 100%, 40%);">- /* Variable MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x200, 0x201, 0x202, 0x203</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x204, 0x205, 0x206, 0x207</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x208, 0x209, 0x20A, 0x20B</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x20C, 0x20D, 0x20E, 0x20F</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x210, 0x211, 0x212, 0x213</span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table_end:</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list:</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_64K_00000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_80000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_A0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F8000</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list_size = . - fixed_mtrr_list</span><br><span>\ No newline at end of file</span><br><span>diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc</span><br><span>index 4b85c07..3f048a5 100644</span><br><span>--- a/src/cpu/intel/model_6ex/cache_as_ram.inc</span><br><span>+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc</span><br><span>@@ -34,18 +34,35 @@</span><br><span> movl $0xFEE00300, %esi</span><br><span> movl %eax, (%esi)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Zero out all fixed range and variable range MTRRs. */</span><br><span style="color: hsl(0, 100%, 40%);">- movl $mtrr_table, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- movl $((mtrr_table_end - mtrr_table) >> 1), %edi</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %eax, %eax</span><br><span style="color: hsl(0, 100%, 40%);">- xorl %edx, %edx</span><br><span style="color: hsl(0, 100%, 40%);">-clear_mtrrs:</span><br><span style="color: hsl(0, 100%, 40%);">- movw (%esi), %bx</span><br><span style="color: hsl(0, 100%, 40%);">- movzx %bx, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ post_code(0x21)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Clear/disable fixed MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $fixed_mtrr_list_size, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_fixed_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ add $-2, %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ movzwl fixed_mtrr_list(%ebx), %ecx</span><br><span> wrmsr</span><br><span style="color: hsl(0, 100%, 40%);">- add $2, %esi</span><br><span style="color: hsl(0, 100%, 40%);">- dec %edi</span><br><span style="color: hsl(0, 100%, 40%);">- jnz clear_mtrrs</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_fixed_mtrr</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Figure put how many MTRRs we have, and clear them out */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_CAP_MSR, %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ rdmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ movzb %al, %ebx /* Number of variable MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov $MTRR_PHYS_BASE(0), %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %eax, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ xor %edx, %edx</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+clear_var_mtrr:</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr</span><br><span style="color: hsl(120, 100%, 40%);">+ inc %ecx</span><br><span style="color: hsl(120, 100%, 40%);">+ dec %ebx</span><br><span style="color: hsl(120, 100%, 40%);">+ jnz clear_var_mtrr</span><br><span style="color: hsl(120, 100%, 40%);">+ post_code(0x21)</span><br><span> </span><br><span> post_code(0x22)</span><br><span> /* Configure the default memory type to uncacheable. */</span><br><span>@@ -253,15 +270,16 @@</span><br><span> hlt</span><br><span> jmp .Lhlt</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table:</span><br><span style="color: hsl(0, 100%, 40%);">- /* Fixed MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x250, 0x258, 0x259</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x268, 0x269, 0x26A</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26B, 0x26C, 0x26D</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x26E, 0x26F</span><br><span style="color: hsl(0, 100%, 40%);">- /* Variable MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x200, 0x201, 0x202, 0x203</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x204, 0x205, 0x206, 0x207</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x208, 0x209, 0x20A, 0x20B</span><br><span style="color: hsl(0, 100%, 40%);">- .word 0x20C, 0x20D, 0x20E, 0x20F</span><br><span style="color: hsl(0, 100%, 40%);">-mtrr_table_end:</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list:</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_64K_00000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_80000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_16K_A0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_C8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_D8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_E8000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F0000</span><br><span style="color: hsl(120, 100%, 40%);">+ .word MTRR_FIX_4K_F8000</span><br><span style="color: hsl(120, 100%, 40%);">+fixed_mtrr_list_size = . - fixed_mtrr_list</span><br><span>\ No newline at end of file</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26712">change 26712</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26712"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia4afdacc2d12db5ea49eb7ae2b4f4295981a6d8b </div>
<div style="display:none"> Gerrit-Change-Number: 26712 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>