<p>Tristan Hsieh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26658">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mediatek: refactor to sharing uart and timer code among similar SOCs<br><br>This patch moves uart and timer code which can be reused<br>into a common directory under soc/mediatek.<br><br>BUG=none<br>BRANCH=none<br>TEST=the refactored code works fine on the new platform (with the rest<br> of the patches applied)<br><br>Change-Id: I5210149b324947ee90f1a481b42f0e2e1f7cfc25<br>Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com><br>---<br>A src/soc/mediatek/common/include/soc/timer.h<br>A src/soc/mediatek/common/timer.c<br>R src/soc/mediatek/common/uart.c<br>M src/soc/mediatek/mt8173/Makefile.inc<br>D src/soc/mediatek/mt8173/include/soc/timer.h<br>D src/soc/mediatek/mt8173/timer.c<br>A src/soc/mediatek/mt8173/timer_prepare.c<br>7 files changed, 149 insertions(+), 146 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/26658/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/mediatek/common/include/soc/timer.h b/src/soc/mediatek/common/include/soc/timer.h</span><br><span>new file mode 100644</span><br><span>index 0000000..91b2b83</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/mediatek/common/include/soc/timer.h</span><br><span>@@ -0,0 +1,44 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 MediaTek Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#pragma once</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/addressmap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <types.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPT4_MHZ 13</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct mtk_gpt_regs {</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 reserved[16];</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 gpt4_con;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 gpt4_clk;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 gpt4_cnt;</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(mtk_gpt_regs, gpt4_con, 0x0040);</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(mtk_gpt_regs, gpt4_clk, 0x0044);</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(mtk_gpt_regs, gpt4_cnt, 0x0048);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct mtk_gpt_regs * const mtk_gpt = (void *)GPT_BASE;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ GPT_CON_EN = 0x01,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPT_CON_CLR = 0x02,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPT_MODE_FREERUN = 0x30,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPT_SYS_CLK = 0x00,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPT_CLK_DIV1 = 0x00,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void timer_prepare(void);</span><br><span>diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c</span><br><span>new file mode 100644</span><br><span>index 0000000..29efd39</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/mediatek/common/timer.c</span><br><span>@@ -0,0 +1,48 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 MediaTek Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <compiler.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <delay.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <thread.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/addressmap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+__weak void timer_prepare(void) { /* do nothing */ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void timer_monotonic_get(struct mono_time *mt)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ mono_time_set_usecs(mt, read32(&mtk_gpt->gpt4_cnt) / GPT4_MHZ);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * init_timer - initialize timer</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void init_timer(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ timer_prepare();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Disable GPT4 and clear the counter */</span><br><span style="color: hsl(120, 100%, 40%);">+ clrbits_le32(&mtk_gpt->gpt4_con, GPT_CON_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ setbits_le32(&mtk_gpt->gpt4_con, GPT_CON_CLR);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set clock source to system clock and set clock divider to 1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_gpt->gpt4_clk, GPT_SYS_CLK | GPT_CLK_DIV1);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set operation mode to FREERUN mode and enable GTP4 */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_gpt->gpt4_con, GPT_CON_EN | GPT_MODE_FREERUN);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/mediatek/mt8173/uart.c b/src/soc/mediatek/common/uart.c</span><br><span>similarity index 92%</span><br><span>rename from src/soc/mediatek/mt8173/uart.c</span><br><span>rename to src/soc/mediatek/common/uart.c</span><br><span>index 93625c4..eec68d4 100644</span><br><span>--- a/src/soc/mediatek/mt8173/uart.c</span><br><span>+++ b/src/soc/mediatek/common/uart.c</span><br><span>@@ -1,7 +1,7 @@</span><br><span> /*</span><br><span> * This file is part of the coreboot project.</span><br><span> *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2015 MediaTek Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 MediaTek Inc.</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -86,10 +86,10 @@</span><br><span> static void mtk_uart_init(void)</span><br><span> {</span><br><span> /* Use a hardcoded divisor for now. */</span><br><span style="color: hsl(0, 100%, 40%);">- const unsigned uartclk = 26 * MHz;</span><br><span style="color: hsl(0, 100%, 40%);">- const unsigned baudrate = get_uart_baudrate();</span><br><span style="color: hsl(120, 100%, 40%);">+ const unsigned int uartclk = 26 * MHz;</span><br><span style="color: hsl(120, 100%, 40%);">+ const unsigned int baudrate = get_uart_baudrate();</span><br><span> const uint8_t line_config = UART8250_LCR_WLS_8; /* 8n1 */</span><br><span style="color: hsl(0, 100%, 40%);">- unsigned highspeed, quot, divisor, remainder;</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned int highspeed, quot, divisor, remainder;</span><br><span> </span><br><span> if (baudrate <= 115200) {</span><br><span> highspeed = 0;</span><br><span>@@ -124,19 +124,21 @@</span><br><span> /* Enable FIFOs, and clear receive and transmit. */</span><br><span> write8(&uart_ptr->fcr,</span><br><span> UART8250_FCR_FIFO_EN | UART8250_FCR_CLEAR_RCVR |</span><br><span style="color: hsl(0, 100%, 40%);">- UART8250_FCR_CLEAR_XMIT);</span><br><span style="color: hsl(120, 100%, 40%);">+ UART8250_FCR_CLEAR_XMIT);</span><br><span> </span><br><span> }</span><br><span> </span><br><span> static void mtk_uart_tx_byte(unsigned char data)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- while (!(read8(&uart_ptr->lsr) & UART8250_LSR_THRE));</span><br><span style="color: hsl(120, 100%, 40%);">+ while (!(read8(&uart_ptr->lsr) & UART8250_LSR_THRE))</span><br><span style="color: hsl(120, 100%, 40%);">+ ;</span><br><span> write8(&uart_ptr->thr, data);</span><br><span> }</span><br><span> </span><br><span> static void mtk_uart_tx_flush(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- while (!(read8(&uart_ptr->lsr) & UART8250_LSR_TEMT));</span><br><span style="color: hsl(120, 100%, 40%);">+ while (!(read8(&uart_ptr->lsr) & UART8250_LSR_TEMT))</span><br><span style="color: hsl(120, 100%, 40%);">+ ;</span><br><span> }</span><br><span> </span><br><span> static unsigned char mtk_uart_rx_byte(void)</span><br><span>diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>index fecd7f1..8709f65 100644</span><br><span>--- a/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>+++ b/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>@@ -20,10 +20,11 @@</span><br><span> bootblock-y += i2c.c</span><br><span> bootblock-y += pll.c</span><br><span> bootblock-y += spi.c</span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += ../common/timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += timer_prepare.c</span><br><span> </span><br><span> ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)</span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> endif</span><br><span> </span><br><span> bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c</span><br><span>@@ -35,9 +36,10 @@</span><br><span> verstage-y += i2c.c</span><br><span> verstage-y += spi.c</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-verstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-verstage-y += timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-y += ../common/timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-y += timer_prepare.c</span><br><span> verstage-y += wdt.c</span><br><span> verstage-$(CONFIG_SPI_FLASH) += flash_controller.c</span><br><span> verstage-y += gpio.c</span><br><span>@@ -46,9 +48,10 @@</span><br><span> </span><br><span> romstage-$(CONFIG_SPI_FLASH) += flash_controller.c</span><br><span> romstage-y += pll.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += ../common/timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += timer_prepare.c</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-romstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> romstage-y += cbmem.c</span><br><span> romstage-y += spi.c</span><br><span> romstage-y += gpio.c</span><br><span>@@ -64,8 +67,9 @@</span><br><span> ramstage-y += spi.c</span><br><span> ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c</span><br><span> ramstage-y += soc.c mtcmos.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += timer.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += ../common/timer.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += timer_prepare.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> ramstage-y += pmic_wrap.c mt6391.c i2c.c</span><br><span> ramstage-y += mt6311.c</span><br><span> ramstage-y += da9212.c</span><br><span>@@ -90,5 +94,6 @@</span><br><span> ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@</span><br><span> </span><br><span> CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include</span><br><span style="color: hsl(120, 100%, 40%);">+CPPFLAGS_common += -Isrc/soc/mediatek/common/include</span><br><span> </span><br><span> endif</span><br><span>diff --git a/src/soc/mediatek/mt8173/include/soc/timer.h b/src/soc/mediatek/mt8173/include/soc/timer.h</span><br><span>deleted file mode 100644</span><br><span>index ac2f00f..0000000</span><br><span>--- a/src/soc/mediatek/mt8173/include/soc/timer.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,71 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2015 MediaTek Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef __SOC_MEDIATEK_MT8173_TIMER_H__</span><br><span style="color: hsl(0, 100%, 40%);">-#define __SOC_MEDIATEK_MT8173_TIMER_H__</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/addressmap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <types.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct mt8173_gpt_regs {</span><br><span style="color: hsl(0, 100%, 40%);">- u32 irqen;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 irqsta;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 irqack;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 reserved0;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt1_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt1_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt1_cnt;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt1_compare;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt2_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt2_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt2_cnt;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt2_compare;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt3_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt3_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt3_cnt;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt3_compare;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt4_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt4_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt4_cnt;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt4_compare;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt5_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt5_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt5_cnt;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt5_compare;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_con;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_clk;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_cntl;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_comparel;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 reserved1[2];</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_cnth;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 gpt6_compareh;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 apxgpt_irqmask;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 apxgpt_irqmask1;</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static struct mt8173_gpt_regs * const mt8173_gpt = (void *)GPT_BASE;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-enum {</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_CON_EN = 0x01,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_CON_CLR = 0x02,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_MODE_ONE_SHOT = 0x00,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_MODE_REPEAT = 0x10,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_MODE_KEEP_GO = 0x20,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_MODE_FREERUN = 0x30,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_SYS_CLK = 0x00,</span><br><span style="color: hsl(0, 100%, 40%);">- GPT_SYS_RTC = 0x01,</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* __SOC_MEDIATEK_MT8173_TIMER_H__ */</span><br><span>diff --git a/src/soc/mediatek/mt8173/timer.c b/src/soc/mediatek/mt8173/timer.c</span><br><span>deleted file mode 100644</span><br><span>index b8d8a64..0000000</span><br><span>--- a/src/soc/mediatek/mt8173/timer.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,60 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2015 MediaTek Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <delay.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <thread.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/addressmap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/mcucfg.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define GPT4_MHZ 13</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void timer_monotonic_get(struct mono_time *mt)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- mono_time_set_usecs(mt, read32(&mt8173_gpt->gpt4_cnt) / GPT4_MHZ);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * init_timer - initialize timer</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-void init_timer(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set XGPT_IDX to 0, then the bit field of XGPT_CTL will be programmed</span><br><span style="color: hsl(0, 100%, 40%);">- * with following definition.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * [10: 8] Clock mode</span><br><span style="color: hsl(0, 100%, 40%);">- * 100: 26Mhz / 4</span><br><span style="color: hsl(0, 100%, 40%);">- * 010: 26Mhz / 2</span><br><span style="color: hsl(0, 100%, 40%);">- * 001: 26Mhz</span><br><span style="color: hsl(0, 100%, 40%);">- * [ 1: 1] Halt-on-debug enable bit</span><br><span style="color: hsl(0, 100%, 40%);">- * [ 0: 0] XGPT enable bit</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_mcucfg->xgpt_idx, 0);</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set clock mode to 13Mhz and enable XGPT */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_mcucfg->xgpt_ctl, (0x1 | ((26 / GPT4_MHZ) << 8)));</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Disable GPT4 and clear the counter */</span><br><span style="color: hsl(0, 100%, 40%);">- clrbits_le32(&mt8173_gpt->gpt4_con, GPT_CON_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- setbits_le32(&mt8173_gpt->gpt4_con, GPT_CON_CLR);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set clock source to system clock and set clock divider to 1 */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_gpt->gpt4_clk, GPT_SYS_CLK | 0x0);</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set operation mode to FREERUN mode and enable GTP4 */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_gpt->gpt4_con, GPT_CON_EN | GPT_MODE_FREERUN);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/mediatek/mt8173/timer_prepare.c b/src/soc/mediatek/mt8173/timer_prepare.c</span><br><span>new file mode 100644</span><br><span>index 0000000..300c65a</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/mediatek/mt8173/timer_prepare.c</span><br><span>@@ -0,0 +1,35 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 MediaTek Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/mcucfg.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void timer_prepare(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set XGPT_IDX to 0, then the bit field of XGPT_CTL will be programmed</span><br><span style="color: hsl(120, 100%, 40%);">+ * with following definition.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * [10: 8] Clock mode</span><br><span style="color: hsl(120, 100%, 40%);">+ * 100: 26Mhz / 4</span><br><span style="color: hsl(120, 100%, 40%);">+ * 010: 26Mhz / 2</span><br><span style="color: hsl(120, 100%, 40%);">+ * 001: 26Mhz</span><br><span style="color: hsl(120, 100%, 40%);">+ * [ 1: 1] Halt-on-debug enable bit</span><br><span style="color: hsl(120, 100%, 40%);">+ * [ 0: 0] XGPT enable bit</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mt8173_mcucfg->xgpt_idx, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set clock mode to 13Mhz and enable XGPT */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mt8173_mcucfg->xgpt_ctl, (0x1 | ((26 / GPT4_MHZ) << 8)));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26658">change 26658</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5210149b324947ee90f1a481b42f0e2e1f7cfc25 </div>
<div style="display:none"> Gerrit-Change-Number: 26658 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com> </div>