<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26629">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/kontron: Get rid of whitespace before tab<br><br>Change-Id: I335dda11d0c1ee58bd2728580c48c41cef574654<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/kontron/986lcd-m/acpi/thermal.asl<br>M src/mainboard/kontron/kt690/devicetree.cb<br>M src/mainboard/kontron/kt690/dsdt.asl<br>3 files changed, 22 insertions(+), 22 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/26629/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl</span><br><span>index ef77046..72390b5 100644</span><br><span>--- a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl</span><br><span>+++ b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl</span><br><span>@@ -36,7 +36,7 @@</span><br><span> </span><br><span>             // Method (_AC1, 0, Serialized)</span><br><span>              // {</span><br><span style="color: hsl(0, 100%, 40%);">-            //      Return (0xf5c)</span><br><span style="color: hsl(120, 100%, 40%);">+                //      Return (0xf5c)</span><br><span>               // }</span><br><span> </span><br><span>             // Critical shutdown temperature</span><br><span>diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb</span><br><span>index 3ab3337..af3e58c 100644</span><br><span>--- a/src/mainboard/kontron/kt690/devicetree.cb</span><br><span>+++ b/src/mainboard/kontron/kt690/devicetree.cb</span><br><span>@@ -19,7 +19,7 @@</span><br><span>                chip northbridge/amd/amdk8</span><br><span>                   device pci 18.0 on #  southbridge</span><br><span>                            chip southbridge/amd/rs690</span><br><span style="color: hsl(0, 100%, 40%);">-                                      device pci 0.0 on end # HT      0x7910</span><br><span style="color: hsl(120, 100%, 40%);">+                                        device pci 0.0 on end # HT      0x7910</span><br><span>                                       device pci 1.0 on  # Internal Graphics P2P bridge 0x7912</span><br><span>                                             device pci 5.0 on end   # Internal Graphics 0x791F</span><br><span>                                   end</span><br><span>@@ -48,7 +48,7 @@</span><br><span>                                      device pci 13.3 on end # USB   0x438a</span><br><span>                                        device pci 13.4 on end # USB   0x438b</span><br><span>                                        device pci 13.5 on end # USB 2 0x4386</span><br><span style="color: hsl(0, 100%, 40%);">-                                   device pci 14.0 on # SM        0x4385</span><br><span style="color: hsl(120, 100%, 40%);">+                                 device pci 14.0 on # SM        0x4385</span><br><span>                                                chip drivers/generic/generic #dimm 0-0-0</span><br><span>                                                     device i2c 50 on end</span><br><span>                                                 end</span><br><span>diff --git a/src/mainboard/kontron/kt690/dsdt.asl b/src/mainboard/kontron/kt690/dsdt.asl</span><br><span>index 889293f..1300571 100644</span><br><span>--- a/src/mainboard/kontron/kt690/dsdt.asl</span><br><span>+++ b/src/mainboard/kontron/kt690/dsdt.asl</span><br><span>@@ -198,9 +198,9 @@</span><br><span>               PWMK, 1,</span><br><span>             PWNS, 1,</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-            /*      Offset(0x61), */        /*  Options_1 */</span><br><span style="color: hsl(0, 100%, 40%);">-                /*              ,7,  */</span><br><span style="color: hsl(0, 100%, 40%);">-         /*              R617,1, */</span><br><span style="color: hsl(120, 100%, 40%);">+            /*      Offset(0x61), */        /*  Options_1 */</span><br><span style="color: hsl(120, 100%, 40%);">+              /*              ,7,  */</span><br><span style="color: hsl(120, 100%, 40%);">+               /*              R617,1, */</span><br><span> </span><br><span>               Offset(0x65),   /* UsbPMControl */</span><br><span>           , 4,</span><br><span>@@ -799,7 +799,7 @@</span><br><span> </span><br><span>               /* On older chips, clear PciExpWakeDisEn */</span><br><span>          /*if (LLessEqual(\_SB.SBRI, 0x13)) {</span><br><span style="color: hsl(0, 100%, 40%);">-            *       Store(0,\_SB.PWDE)</span><br><span style="color: hsl(120, 100%, 40%);">+            *       Store(0,\_SB.PWDE)</span><br><span>           *}</span><br><span>           */</span><br><span> </span><br><span>@@ -815,13 +815,13 @@</span><br><span>       *  used, so it could be removed.</span><br><span>     *</span><br><span>    *</span><br><span style="color: hsl(0, 100%, 40%);">-       *       \_GTS OEM Going To Sleep method</span><br><span style="color: hsl(120, 100%, 40%);">+       *       \_GTS OEM Going To Sleep method</span><br><span>      *</span><br><span style="color: hsl(0, 100%, 40%);">-       *       Entry:</span><br><span style="color: hsl(0, 100%, 40%);">-  *               Arg0=The value of the sleeping state S1=1, S2=2</span><br><span style="color: hsl(120, 100%, 40%);">+       *       Entry:</span><br><span style="color: hsl(120, 100%, 40%);">+        *               Arg0=The value of the sleeping state S1=1, S2=2</span><br><span>      *</span><br><span style="color: hsl(0, 100%, 40%);">-       *       Exit:</span><br><span style="color: hsl(0, 100%, 40%);">-   *               -none-</span><br><span style="color: hsl(120, 100%, 40%);">+        *       Exit:</span><br><span style="color: hsl(120, 100%, 40%);">+ *               -none-</span><br><span>       *</span><br><span>    *  Method(\_GTS, 1) {</span><br><span>        *  DBGO("\\_GTS\n")</span><br><span>@@ -989,7 +989,7 @@</span><br><span> </span><br><span>              /*  PCIe HotPlug event  */</span><br><span>           /* Method(_L0F) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L0F\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L0F\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>@@ -1012,19 +1012,19 @@</span><br><span> </span><br><span>                 /*  GPM0 SCI event - Moved to USB.asl */</span><br><span>             /* Method(_L13) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L13\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L13\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>               /*  GPM1 SCI event - Moved to USB.asl */</span><br><span>             /* Method(_L14) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L14\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L14\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>               /*  GPM2 SCI event - Moved to USB.asl */</span><br><span>             /* Method(_L15) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L15\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L15\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>@@ -1036,7 +1036,7 @@</span><br><span> </span><br><span>           /*  GPM8 SCI event - Moved to USB.asl */</span><br><span>             /* Method(_L17) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L17\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L17\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>@@ -1053,7 +1053,7 @@</span><br><span> </span><br><span>           /*  GPM4 SCI event - Moved to USB.asl */</span><br><span>             /* Method(_L19) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L19\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L19\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>@@ -1084,7 +1084,7 @@</span><br><span> </span><br><span>           /*  GPIO2 or GPIO66 SCI event  */</span><br><span>            /* Method(_L1E) {</span><br><span style="color: hsl(0, 100%, 40%);">-               *       DBGO("\\_GPE\\_L1E\n")</span><br><span style="color: hsl(120, 100%, 40%);">+              *       DBGO("\\_GPE\\_L1E\n")</span><br><span>             * }</span><br><span>          */</span><br><span> </span><br><span>@@ -1094,7 +1094,7 @@</span><br><span>               * }</span><br><span>          */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  }       /* End Scope GPE */</span><br><span style="color: hsl(120, 100%, 40%);">+   }       /* End Scope GPE */</span><br><span> </span><br><span>      #include "acpi/usb.asl"</span><br><span> </span><br><span>@@ -1463,7 +1463,7 @@</span><br><span>                                )</span><br><span> </span><br><span>                                Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)</span><br><span style="color: hsl(0, 100%, 40%);">-                              Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */</span><br><span style="color: hsl(120, 100%, 40%);">+                                Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */</span><br><span>                               Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)   /* Assume C0000-E0000 empty */</span><br><span>                               Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */</span><br><span> </span><br><span>@@ -1577,7 +1577,7 @@</span><br><span> </span><br><span>                          /* On older chips, clear PciExpWakeDisEn */</span><br><span>                          /*if (LLessEqual(\SBRI, 0x13)) {</span><br><span style="color: hsl(0, 100%, 40%);">-                                *       Store(0,\PWDE)</span><br><span style="color: hsl(120, 100%, 40%);">+                                *       Store(0,\PWDE)</span><br><span>                               * }</span><br><span>                          */</span><br><span>                   } /* End Method(_SB._INI) */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26629">change 26629</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26629"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I335dda11d0c1ee58bd2728580c48c41cef574654 </div>
<div style="display:none"> Gerrit-Change-Number: 26629 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>