<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26633">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/pcengines: Get rid of whitespace before tab<br><br>Change-Id: Id13c0ee284293c0c06d46c75c850bc7e81cfc1f6<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/pcengines/alix1c/devicetree.cb<br>M src/mainboard/pcengines/alix1c/irq_tables.c<br>M src/mainboard/pcengines/alix2d/devicetree.cb<br>M src/mainboard/pcengines/apu1/acpi/gpe.asl<br>M src/mainboard/pcengines/apu1/acpi/sleep.asl<br>M src/mainboard/pcengines/apu2/acpi/gpe.asl<br>M src/mainboard/pcengines/apu2/dsdt.asl<br>M src/mainboard/pcengines/apu2/mptable.c<br>8 files changed, 19 insertions(+), 19 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/26633/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb</span><br><span>index 20e865a..4000809 100644</span><br><span>--- a/src/mainboard/pcengines/alix1c/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/alix1c/devicetree.cb</span><br><span>@@ -1,8 +1,8 @@</span><br><span> chip northbridge/amd/lx</span><br><span style="color: hsl(0, 100%, 40%);">- device domain 0 on</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device domain 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1.0 on end</span><br><span> device pci 1.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- chip southbridge/amd/cs5536</span><br><span style="color: hsl(120, 100%, 40%);">+ chip southbridge/amd/cs5536</span><br><span> # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK</span><br><span> # SIRQ Mode = Active(Quiet) mode. Save power....</span><br><span> # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK</span><br><span>@@ -25,7 +25,7 @@</span><br><span> register "com2_address" = "0x2F8"</span><br><span> register "com2_irq" = "3"</span><br><span> register "unwanted_vpci[0]" = "0" # End of list has a zero</span><br><span style="color: hsl(0, 100%, 40%);">- device pci f.0 on # ISA Bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci f.0 on # ISA Bridge</span><br><span> chip superio/winbond/w83627hf</span><br><span> device pnp 2e.0 off # Floppy</span><br><span> io 0x60 = 0x3f0</span><br><span>@@ -69,10 +69,10 @@</span><br><span> end</span><br><span> device pci f.1 on end # Flash controller</span><br><span> device pci f.2 on end # IDE controller</span><br><span style="color: hsl(0, 100%, 40%);">- device pci f.3 on end # Audio</span><br><span style="color: hsl(0, 100%, 40%);">- device pci f.4 on end # OHCI</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci f.3 on end # Audio</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci f.4 on end # OHCI</span><br><span> device pci f.5 on end # EHCI</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> end</span><br><span> </span><br><span> # APIC cluster is late CPU init.</span><br><span>diff --git a/src/mainboard/pcengines/alix1c/irq_tables.c b/src/mainboard/pcengines/alix1c/irq_tables.c</span><br><span>index 89ac717..4d85a1f 100644</span><br><span>--- a/src/mainboard/pcengines/alix1c/irq_tables.c</span><br><span>+++ b/src/mainboard/pcengines/alix1c/irq_tables.c</span><br><span>@@ -57,8 +57,8 @@</span><br><span> * -------------------------------------------------</span><br><span> * AES 00:01.2 0a 01 A A</span><br><span> * 3VPCI 00:0c.0 0a 01 A A</span><br><span style="color: hsl(0, 100%, 40%);">- * eth0 00:0d.0 0b 01 A B</span><br><span style="color: hsl(0, 100%, 40%);">- * mpci 00:0e.0 0a 01 A A</span><br><span style="color: hsl(120, 100%, 40%);">+ * eth0 00:0d.0 0b 01 A B</span><br><span style="color: hsl(120, 100%, 40%);">+ * mpci 00:0e.0 0a 01 A A</span><br><span> * usb 00:0f.3 0b 02 B B</span><br><span> * usb 00:0f.4 0b 04 D D</span><br><span> * usb 00:0f.5 0b 04 D D</span><br><span>diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb</span><br><span>index f8368ed..5f37140 100644</span><br><span>--- a/src/mainboard/pcengines/alix2d/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/alix2d/devicetree.cb</span><br><span>@@ -1,8 +1,8 @@</span><br><span> chip northbridge/amd/lx</span><br><span style="color: hsl(0, 100%, 40%);">- device domain 0 on</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device domain 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1.0 on end</span><br><span> device pci 1.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- chip southbridge/amd/cs5536</span><br><span style="color: hsl(120, 100%, 40%);">+ chip southbridge/amd/cs5536</span><br><span> # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK</span><br><span> # SIRQ Mode = Active(Quiet) mode. Save power....</span><br><span> # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK</span><br><span>@@ -32,7 +32,7 @@</span><br><span> device pci f.2 on end # IDE controller</span><br><span> device pci f.4 on end # OHCI</span><br><span> device pci f.5 on end # EHCI</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> end</span><br><span> </span><br><span> # APIC cluster is late CPU init.</span><br><span>diff --git a/src/mainboard/pcengines/apu1/acpi/gpe.asl b/src/mainboard/pcengines/apu1/acpi/gpe.asl</span><br><span>index 2f22758..30e6fdc 100644</span><br><span>--- a/src/mainboard/pcengines/apu1/acpi/gpe.asl</span><br><span>+++ b/src/mainboard/pcengines/apu1/acpi/gpe.asl</span><br><span>@@ -72,7 +72,7 @@</span><br><span> Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */</span><br><span> Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-} /* End Scope GPE */</span><br><span style="color: hsl(120, 100%, 40%);">+} /* End Scope GPE */</span><br><span> </span><br><span> /* Contains the GPEs for USB overcurrent */</span><br><span> #include "usb_oc.asl"</span><br><span>diff --git a/src/mainboard/pcengines/apu1/acpi/sleep.asl b/src/mainboard/pcengines/apu1/acpi/sleep.asl</span><br><span>index d7cf365..ec38a8a 100644</span><br><span>--- a/src/mainboard/pcengines/apu1/acpi/sleep.asl</span><br><span>+++ b/src/mainboard/pcengines/apu1/acpi/sleep.asl</span><br><span>@@ -49,7 +49,7 @@</span><br><span> </span><br><span> /* On older chips, clear PciExpWakeDisEn */</span><br><span> /*if (LLessEqual(\_SB.SBRI, 0x13)) {</span><br><span style="color: hsl(0, 100%, 40%);">- * Store(0,\_SB.PWDE)</span><br><span style="color: hsl(120, 100%, 40%);">+ * Store(0,\_SB.PWDE)</span><br><span> *}</span><br><span> */</span><br><span> </span><br><span>diff --git a/src/mainboard/pcengines/apu2/acpi/gpe.asl b/src/mainboard/pcengines/apu2/acpi/gpe.asl</span><br><span>index cd366dc..4a6f6f8 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/acpi/gpe.asl</span><br><span>+++ b/src/mainboard/pcengines/apu2/acpi/gpe.asl</span><br><span>@@ -64,4 +64,4 @@</span><br><span> Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */</span><br><span> Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-} /* End Scope GPE */</span><br><span style="color: hsl(120, 100%, 40%);">+} /* End Scope GPE */</span><br><span>diff --git a/src/mainboard/pcengines/apu2/dsdt.asl b/src/mainboard/pcengines/apu2/dsdt.asl</span><br><span>index d3fb3b1..03bd33e 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/dsdt.asl</span><br><span>+++ b/src/mainboard/pcengines/apu2/dsdt.asl</span><br><span>@@ -46,7 +46,7 @@</span><br><span> </span><br><span> /* System Bus */</span><br><span> Scope(\_SB) { /* Start \_SB scope */</span><br><span style="color: hsl(0, 100%, 40%);">- /* global utility methods expected within the \_SB scope */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* global utility methods expected within the \_SB scope */</span><br><span> #include <arch/x86/acpi/globutil.asl></span><br><span> </span><br><span> /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */</span><br><span>diff --git a/src/mainboard/pcengines/apu2/mptable.c b/src/mainboard/pcengines/apu2/mptable.c</span><br><span>index 228e281..f62108c 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/mptable.c</span><br><span>+++ b/src/mainboard/pcengines/apu2/mptable.c</span><br><span>@@ -40,7 +40,7 @@</span><br><span> // 0x03,0x04,0x05,0x07,0x00,0x00,0x00,0x00, /* 50 - 57 */</span><br><span> 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 50 - 57 */</span><br><span> 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 58 - 5F */</span><br><span style="color: hsl(0, 100%, 40%);">- 0x00,0x00,0x1F /* 60 - 62 */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00,0x00,0x1F /* 60 - 62 */</span><br><span> };</span><br><span> u8 intr_data[FCH_INT_TABLE_SIZE] = {</span><br><span> 0x10,0x10,0x12,0x13,0x14,0x15,0x1F,0x1F, /* 00 - 07 : INTA - INTF and 2 reserved dont map 4*/</span><br><span>@@ -56,7 +56,7 @@</span><br><span> // 0x10,0x11,0x12,0x13,0x00,0x00,0x00,0x00, /* 50 - 57 */</span><br><span> 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 50 - 57 */</span><br><span> 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 58 - 5F */</span><br><span style="color: hsl(0, 100%, 40%);">- 0x00,0x00,0x1F /* 60 - 62 */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00,0x00,0x1F /* 60 - 62 */</span><br><span> };</span><br><span> </span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26633">change 26633</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26633"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id13c0ee284293c0c06d46c75c850bc7e81cfc1f6 </div>
<div style="display:none"> Gerrit-Change-Number: 26633 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>