<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26644">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block/cpu: Add option to skip coreboot AP init<br><br>SoC users from IOTG team is looking forward for a solution to skip<br>coreboot AP initialization flow and make use of FSPS-UPD to<br>perform AP reset.<br><br>TEST=Assign FspSkipMpInit=0 to ensure coreboot is not bringing APs<br>out of reset.<br><br>Change-Id: Ibc8cd411e802fb682436a933073922b2693ba994<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/common/block/cpu/mp_init.c<br>1 file changed, 19 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/26644/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>index 97ad176..7a3ba87 100644</span><br><span>--- a/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>+++ b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>@@ -16,6 +16,7 @@</span><br><span> #include <arch/io.h></span><br><span> #include <assert.h></span><br><span> #include <bootstate.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <chip.h></span><br><span> #include <compiler.h></span><br><span> #include <cpu/cpu.h></span><br><span> #include <cpu/x86/mtrr.h></span><br><span>@@ -119,11 +120,26 @@</span><br><span> *parallel = 1;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static bool do_mp_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ device_t dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(dev != NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+ config_t *config = dev->chip_info;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (config->FspSkipMpInit)</span><br><span style="color: hsl(120, 100%, 40%);">+ return true;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return false;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static void init_cpus(void *unused)</span><br><span> {</span><br><span> device_t dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);</span><br><span> assert(dev != NULL);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ if (!do_mp_init())</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> microcode_patch = intel_microcode_find();</span><br><span> intel_microcode_load_unlocked(microcode_patch);</span><br><span> </span><br><span>@@ -138,6 +154,9 @@</span><br><span> /* Ensure to re-program all MTRRs based on DRAM resource settings */</span><br><span> static void post_cpus_init(void *unused)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!do_mp_init())</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL, 1000) < 0)</span><br><span> printk(BIOS_ERR, "MTRR programming failure\n");</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26644">change 26644</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26644"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ibc8cd411e802fb682436a933073922b2693ba994 </div>
<div style="display:none"> Gerrit-Change-Number: 26644 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>