<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26589">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/fsp_broadwell_de: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I68c455d4bc524c2dd2d3ba87ab6641e70c78521c<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/soc/intel/fsp_broadwell_de/acpi.c<br>M src/soc/intel/fsp_broadwell_de/chip.c<br>M src/soc/intel/fsp_broadwell_de/cpu.c<br>M src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h<br>M src/soc/intel/fsp_broadwell_de/northcluster.c<br>M src/soc/intel/fsp_broadwell_de/ramstage.c<br>M src/soc/intel/fsp_broadwell_de/smbus.c<br>M src/soc/intel/fsp_broadwell_de/smmrelocate.c<br>M src/soc/intel/fsp_broadwell_de/southcluster.c<br>M src/soc/intel/fsp_broadwell_de/spi.c<br>10 files changed, 33 insertions(+), 33 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/26589/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c</span><br><span>index 4c6417d..0b32388 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/acpi.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/acpi.c</span><br><span>@@ -82,7 +82,7 @@</span><br><span> {</span><br><span> uint8_t actl = 0;</span><br><span> static uint8_t sci_irq = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));</span><br><span> </span><br><span> /* If this function was already called, just return the stored value. */</span><br><span> if (sci_irq)</span><br><span>@@ -395,7 +395,7 @@</span><br><span> struct acpi_rsdp *const rsdp)</span><br><span> {</span><br><span> acpi_dmar_t *const dmar = (acpi_dmar_t *)current;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t vtdev = dev_find_slot(0, PCI_DEVFN(5, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *vtdev = dev_find_slot(0, PCI_DEVFN(5, 0));</span><br><span> </span><br><span> /* Create DMAR table only if virtualization is enabled */</span><br><span> if (!(pci_read_config32(vtdev, 0x180) & 0x01))</span><br><span>@@ -523,7 +523,7 @@</span><br><span> acpigen_pop_len();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void generate_cpu_entries(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void generate_cpu_entries(struct device *device)</span><br><span> {</span><br><span> int core;</span><br><span> int pcontrol_blk = get_pmbase(), plen = 6;</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c</span><br><span>index d033374..cab2460 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/chip.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/chip.c</span><br><span>@@ -25,7 +25,7 @@</span><br><span> #include <soc/ramstage.h></span><br><span> #include <chip.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span> assign_resources(dev->link_list);</span><br><span> }</span><br><span>@@ -58,7 +58,7 @@</span><br><span> .scan_bus = NULL,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void enable_dev(struct device *dev)</span><br><span> {</span><br><span> printk(BIOS_DEBUG, "enable_dev(%s, %d)\n",</span><br><span> dev_name(dev), dev->path.type);</span><br><span>@@ -89,7 +89,7 @@</span><br><span> .init = soc_init,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)</span><br><span> {</span><br><span> if (!vendor || !device) {</span><br><span> pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c</span><br><span>index d89ae87..a50c839 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/cpu.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/cpu.c</span><br><span>@@ -116,7 +116,7 @@</span><br><span> .post_mp_init = post_mp_init</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void broadwell_de_init_cpus(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void broadwell_de_init_cpus(struct device *dev)</span><br><span> {</span><br><span> struct bus *cpu_bus = dev->link_list;</span><br><span> </span><br><span>@@ -150,7 +150,7 @@</span><br><span> wrmsr(MSR_IA32_MC0_STATUS + (i * 4), msr);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void broadwell_de_core_init(device_t cpu)</span><br><span style="color: hsl(120, 100%, 40%);">+static void broadwell_de_core_init(struct device *cpu)</span><br><span> {</span><br><span> printk(BIOS_DEBUG, "Init Broadwell-DE core.\n");</span><br><span> configure_mca();</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h b/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h</span><br><span>index c01c9ac..785b689 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h</span><br><span>@@ -22,8 +22,8 @@</span><br><span> /* The broadwell_de_init_pre_device() function is called prior to device</span><br><span> * initialization, but it's after console and cbmem has been reinitialized. */</span><br><span> void broadwell_de_init_pre_device(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void broadwell_de_init_cpus(device_t dev);</span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_enable_dev(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void broadwell_de_init_cpus(struct device *dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_enable_dev(struct device *dev);</span><br><span> </span><br><span> extern struct pci_operations soc_pci_ops;</span><br><span> </span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/northcluster.c b/src/soc/intel/fsp_broadwell_de/northcluster.c</span><br><span>index c15ff5f..7090370 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/northcluster.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/northcluster.c</span><br><span>@@ -56,7 +56,7 @@</span><br><span> return index;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_add_dram_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_add_dram_resources(struct device *dev)</span><br><span> {</span><br><span> u32 fsp_mem_base, fsp_mem_len;</span><br><span> u32 tseg_base, tseg_length;</span><br><span>@@ -120,7 +120,7 @@</span><br><span> index = add_fixed_resources(dev, index);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void nc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void nc_read_resources(struct device *dev)</span><br><span> {</span><br><span> /* Call the normal read_resources */</span><br><span> pci_dev_read_resources(dev);</span><br><span>@@ -129,7 +129,7 @@</span><br><span> mc_add_dram_resources(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void nc_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void nc_enable(struct device *dev)</span><br><span> {</span><br><span> print_fsp_info();</span><br><span> }</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/ramstage.c b/src/soc/intel/fsp_broadwell_de/ramstage.c</span><br><span>index 7b2f141..7165080 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/ramstage.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/ramstage.c</span><br><span>@@ -57,7 +57,7 @@</span><br><span> </span><br><span> static void fill_in_pattrs(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> struct pattrs *attrs = (struct pattrs *)pattrs_get();</span><br><span> </span><br><span> attrs->cpuid = cpuid_eax(1);</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/smbus.c b/src/soc/intel/fsp_broadwell_de/smbus.c</span><br><span>index 039f841..b5870d7 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/smbus.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/smbus.c</span><br><span>@@ -26,7 +26,7 @@</span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/smbus.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_smbus_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_smbus_init(struct device *dev)</span><br><span> {</span><br><span> struct resource *res;</span><br><span> </span><br><span>@@ -36,7 +36,7 @@</span><br><span> outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_smbus_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_smbus_enable(struct device *dev)</span><br><span> {</span><br><span> uint8_t reg8;</span><br><span> </span><br><span>@@ -45,7 +45,7 @@</span><br><span> pci_write_config8(dev, HOSTC, reg8);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_read_byte(device_t dev, uint8_t address)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_read_byte(struct device *dev, uint8_t address)</span><br><span> {</span><br><span> uint16_t device;</span><br><span> struct resource *res;</span><br><span>@@ -58,7 +58,7 @@</span><br><span> return do_smbus_read_byte(res->base, device, address);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t data)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t data)</span><br><span> {</span><br><span> uint16_t device;</span><br><span> struct resource *res;</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c</span><br><span>index a94693b..e8c0700 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c</span><br><span>@@ -109,7 +109,7 @@</span><br><span> smm_mca_cap = rdmsr(SMM_MCA_CAP_MSR);</span><br><span> if (smm_mca_cap.hi & SMM_CPU_SVRSTR_MASK) {</span><br><span> uint32_t smm_feature_control;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);</span><br><span> </span><br><span> /*</span><br><span> * SMM_FEATURE_CONTROL on Broadwell-DE is not located in</span><br><span>@@ -155,7 +155,7 @@</span><br><span> */</span><br><span> if (relo_params->smm_save_state_in_msrs) {</span><br><span> uint32_t smm_feature_control;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);</span><br><span> </span><br><span> /*</span><br><span> * SMM_FEATURE_CONTROL on Broadwell-DE is not located in</span><br><span>@@ -191,7 +191,7 @@</span><br><span> write_prmrr(relo_params);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static u32 northbridge_get_base_reg(device_t dev, int reg)</span><br><span style="color: hsl(120, 100%, 40%);">+static u32 northbridge_get_base_reg(struct device *dev, int reg)</span><br><span> {</span><br><span> u32 value;</span><br><span> </span><br><span>@@ -201,7 +201,7 @@</span><br><span> return value;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void fill_in_relocation_params(device_t dev,</span><br><span style="color: hsl(120, 100%, 40%);">+static void fill_in_relocation_params(struct device *dev,</span><br><span> struct smm_relocation_params *params)</span><br><span> {</span><br><span> u32 tseg_size;</span><br><span>@@ -276,7 +276,7 @@</span><br><span> void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,</span><br><span> size_t *smm_save_state_size)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC);</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC);</span><br><span> </span><br><span> printk(BIOS_DEBUG, "Setting up SMI for CPU\n");</span><br><span> </span><br><span>@@ -325,7 +325,7 @@</span><br><span> </span><br><span> void smm_lock(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC);</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC);</span><br><span> uint16_t smi_lock;</span><br><span> </span><br><span> /* There is no register to lock SMRAM region on Broadwell-DE.</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/southcluster.c b/src/soc/intel/fsp_broadwell_de/southcluster.c</span><br><span>index 8ad27af..5d22089 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/southcluster.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/southcluster.c</span><br><span>@@ -39,12 +39,12 @@</span><br><span> typedef struct soc_intel_fsp_broadwell_de_config config_t;</span><br><span> </span><br><span> static inline void</span><br><span style="color: hsl(0, 100%, 40%);">-add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size)</span><br><span style="color: hsl(120, 100%, 40%);">+add_mmio_resource(struct device *dev, int i, unsigned long addr, unsigned long size)</span><br><span> {</span><br><span> mmio_resource(dev, i, addr >> 10, size >> 10);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sc_add_mmio_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sc_add_mmio_resources(struct device *dev)</span><br><span> {</span><br><span> add_mmio_resource(dev, 0xfeb0,</span><br><span> ABORT_BASE_ADDRESS,</span><br><span>@@ -84,8 +84,8 @@</span><br><span> */</span><br><span> static void write_pci_config_irqs(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t irq_dev;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t targ_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *irq_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *targ_dev;</span><br><span> uint8_t int_line = 0;</span><br><span> uint8_t original_int_pin = 0;</span><br><span> uint8_t new_int_pin = 0;</span><br><span>@@ -168,7 +168,7 @@</span><br><span> printk(BIOS_DEBUG, "PCI_CFG IRQ: Finished writing PCI config space IRQ assignments\n");</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sc_pirq_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sc_pirq_init(struct device *dev)</span><br><span> {</span><br><span> int i;</span><br><span> const uint8_t *pirq = global_broadwell_de_irq_route.pic;</span><br><span>@@ -183,7 +183,7 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sc_add_io_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sc_add_io_resources(struct device *dev)</span><br><span> {</span><br><span> struct resource *res;</span><br><span> u8 io_index = 0;</span><br><span>@@ -210,7 +210,7 @@</span><br><span> pci_write_config8(dev, GPIO_CTRL_OFFSET, GPIO_DECODE_ENABLE);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sc_read_resources(struct device *dev)</span><br><span> {</span><br><span> pci_dev_read_resources(dev);</span><br><span> sc_add_mmio_resources(dev);</span><br><span>@@ -246,7 +246,7 @@</span><br><span> /*</span><br><span> * Common code for the south cluster devices.</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_enable_dev(struct device *dev)</span><br><span> {</span><br><span> uint32_t reg32;</span><br><span> </span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c</span><br><span>index 26c6e65..605cb5e 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/spi.c</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/spi.c</span><br><span>@@ -266,7 +266,7 @@</span><br><span> uint8_t *rcrb; /* Root Complex Register Block */</span><br><span> uint32_t rcba; /* Root Complex Base Address */</span><br><span> uint8_t bios_cntl;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> ich9_spi_regs *ich9_spi;</span><br><span> </span><br><span> #ifdef __SMM__</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26589">change 26589</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26589"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I68c455d4bc524c2dd2d3ba87ab6641e70c78521c </div>
<div style="display:none"> Gerrit-Change-Number: 26589 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>