<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26587">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton_ns: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I15e624b40d11f61a3870a6083be82d062690498d<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/soc/intel/denverton_ns/acpi.c<br>M src/soc/intel/denverton_ns/chip.c<br>M src/soc/intel/denverton_ns/cpu.c<br>M src/soc/intel/denverton_ns/include/soc/acpi.h<br>M src/soc/intel/denverton_ns/include/soc/ramstage.h<br>M src/soc/intel/denverton_ns/lpc.c<br>M src/soc/intel/denverton_ns/npk.c<br>M src/soc/intel/denverton_ns/pmc.c<br>M src/soc/intel/denverton_ns/sata.c<br>M src/soc/intel/denverton_ns/systemagent.c<br>10 files changed, 38 insertions(+), 36 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/26587/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c</span><br><span>index 1071ab5..640dc79 100644</span><br><span>--- a/src/soc/intel/denverton_ns/acpi.c</span><br><span>+++ b/src/soc/intel/denverton_ns/acpi.c</span><br><span>@@ -57,7 +57,7 @@</span><br><span> static int acpi_sci_irq(void)</span><br><span> {</span><br><span>       int scis, sci_irq;</span><br><span style="color: hsl(0, 100%, 40%);">-      device_t dev = get_pmc_dev();</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = get_pmc_dev();</span><br><span> </span><br><span>      if (!dev)</span><br><span>            return 0;</span><br><span>@@ -231,7 +231,7 @@</span><br><span>      fadt->x_gpe1_blk.addrh = 0x00;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void generate_cpu_entries(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void generate_cpu_entries(struct device *device)</span><br><span> {</span><br><span>  int core;</span><br><span>    int pcontrol_blk = get_pmbase(), plen = 6;</span><br><span>@@ -278,7 +278,7 @@</span><br><span>     return current;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long southcluster_write_acpi_tables(device_t device,</span><br><span style="color: hsl(120, 100%, 40%);">+unsigned long southcluster_write_acpi_tables(struct device *device,</span><br><span>                                        unsigned long current,</span><br><span>                                       struct acpi_rsdp *rsdp)</span><br><span> {</span><br><span>@@ -306,7 +306,7 @@</span><br><span>      return current;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_inject_dsdt(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_inject_dsdt(struct device *device)</span><br><span> {</span><br><span>    global_nvs_t *gnvs;</span><br><span> </span><br><span>diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c</span><br><span>index a19f32a..05dcb76 100644</span><br><span>--- a/src/soc/intel/denverton_ns/chip.c</span><br><span>+++ b/src/soc/intel/denverton_ns/chip.c</span><br><span>@@ -34,7 +34,7 @@</span><br><span> #include <spi-generic.h></span><br><span> #include <soc/hob_mem.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span>        assign_resources(dev->link_list);</span><br><span> }</span><br><span>@@ -56,7 +56,7 @@</span><br><span> #endif</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void soc_enable_dev(struct device *dev)</span><br><span> {</span><br><span>       /* Set the operations if it is a special bus type */</span><br><span>         if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span>@@ -130,7 +130,8 @@</span><br><span>   .final = &soc_final</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_set_subsystem(device_t dev, uint32_t vendor, uint32_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void soc_set_subsystem(struct device *dev, uint32_t vendor,</span><br><span style="color: hsl(120, 100%, 40%);">+                          uint32_t device)</span><br><span> {</span><br><span>  if (!vendor || !device) {</span><br><span>            pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,</span><br><span>diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c</span><br><span>index 528d2e5..0dd8509 100644</span><br><span>--- a/src/soc/intel/denverton_ns/cpu.c</span><br><span>+++ b/src/soc/intel/denverton_ns/cpu.c</span><br><span>@@ -33,7 +33,7 @@</span><br><span> </span><br><span> static struct smm_relocation_attrs relo_attrs;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void denverton_core_init(device_t cpu)</span><br><span style="color: hsl(120, 100%, 40%);">+static void denverton_core_init(strcut device *cpu)</span><br><span> {</span><br><span>   msr_t msr;</span><br><span> </span><br><span>@@ -246,7 +246,7 @@</span><br><span>         .post_mp_init = post_mp_init,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void denverton_init_cpus(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void denverton_init_cpus(struct device *dev)</span><br><span> {</span><br><span>     /* Clear for take-off */</span><br><span>     if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/acpi.h b/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>index dd2be4d..14eb167 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>@@ -26,9 +26,9 @@</span><br><span> void acpi_fill_in_fadt(acpi_fadt_t *fadt);</span><br><span> unsigned long acpi_madt_irq_overrides(unsigned long current);</span><br><span> void acpi_init_gnvs(global_nvs_t *gnvs);</span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long southcluster_write_acpi_tables(device_t device,</span><br><span style="color: hsl(120, 100%, 40%);">+unsigned long southcluster_write_acpi_tables(struct device *device,</span><br><span>                                            unsigned long current,</span><br><span>                                       struct acpi_rsdp *rsdp);</span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_inject_dsdt(device_t device);</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_inject_dsdt(struct device *device);</span><br><span> </span><br><span> #endif /* _DENVERTON_NS_ACPI_H_ */</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/ramstage.h b/src/soc/intel/denverton_ns/include/soc/ramstage.h</span><br><span>index fa8beb1..5887b05 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/ramstage.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/ramstage.h</span><br><span>@@ -21,9 +21,9 @@</span><br><span> #include <fsp/util.h></span><br><span> #include <memory_info.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void denverton_init_cpus(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void denverton_init_cpus(struct device *dev);</span><br><span> void mainboard_silicon_init_params(FSPS_UPD *params);</span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_enable_dev(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_enable_dev(struct device *dev);</span><br><span> void mainboard_add_dimm_info(struct memory_info *mem_info, int channel,</span><br><span>                           int dimm, int index);</span><br><span> </span><br><span>diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c</span><br><span>index 1ac0961..0e1a95d 100644</span><br><span>--- a/src/soc/intel/denverton_ns/lpc.c</span><br><span>+++ b/src/soc/intel/denverton_ns/lpc.c</span><br><span>@@ -85,9 +85,9 @@</span><br><span>  * 0x80 - The PIRQ is not routed.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_pirq_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_pirq_init(struct device *dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-      device_t irq_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+     struct device *irq_dev;</span><br><span>      /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span>@@ -178,7 +178,7 @@</span><br><span>      }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_p2sb_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_p2sb_read_resources(struct device *dev)</span><br><span> {</span><br><span>    struct resource *res;</span><br><span> </span><br><span>@@ -236,9 +236,9 @@</span><br><span>      pch_pirq_init(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_lpc_add_mmio_resources(device_t dev) { /* TODO */ }</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_lpc_add_mmio_resources(struct device *dev) { /* TODO */ }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_lpc_add_io_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_lpc_add_io_resources(struct device *dev)</span><br><span> {</span><br><span>      struct resource *res;</span><br><span>        u8 io_index = 0;</span><br><span>@@ -257,7 +257,7 @@</span><br><span>                    IORESOURCE_ASSIGNED | IORESOURCE_FIXED;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span>   /* Get the normal PCI resources of this device. */</span><br><span>   pci_dev_read_resources(dev);</span><br><span>@@ -274,7 +274,7 @@</span><br><span> </span><br><span> static void pch_decode_init(struct device *dev) { /* TODO */ }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_enable_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_enable_resources(struct device *dev)</span><br><span> {</span><br><span>        pch_decode_init(dev);</span><br><span>        pci_dev_enable_resources(dev);</span><br><span>@@ -283,7 +283,7 @@</span><br><span> /* Set bit in Function Disable register to hide this device */</span><br><span> static void pch_hide_devfn(uint32_t devfn) { /* TODO */ }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void southcluster_enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void southcluster_enable_dev(struct device *dev)</span><br><span> {</span><br><span>     u32 reg32;</span><br><span> </span><br><span>diff --git a/src/soc/intel/denverton_ns/npk.c b/src/soc/intel/denverton_ns/npk.c</span><br><span>index 46e5c7e..2352756 100644</span><br><span>--- a/src/soc/intel/denverton_ns/npk.c</span><br><span>+++ b/src/soc/intel/denverton_ns/npk.c</span><br><span>@@ -23,14 +23,14 @@</span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/ramstage.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void npk_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void npk_init(strcut device *dev)</span><br><span> {</span><br><span>         printk(BIOS_DEBUG, "pch: npk_init\n");</span><br><span> </span><br><span>         /* TODO */</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_npk_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_npk_read_resources(struct device *dev)</span><br><span> {</span><br><span>     /* Skip NorthPeak enumeration. */</span><br><span> }</span><br><span>diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c</span><br><span>index 90237a0..fe1b705 100644</span><br><span>--- a/src/soc/intel/denverton_ns/pmc.c</span><br><span>+++ b/src/soc/intel/denverton_ns/pmc.c</span><br><span>@@ -33,7 +33,7 @@</span><br><span> static u16 acpi_base = DEFAULT_ACPI_BASE;</span><br><span> static u32 pwrm_base = DEFAULT_PWRM_BASE;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_power_options(device_t dev) { /* TODO */ }</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_power_options(struct device *dev) { /* TODO */ }</span><br><span> </span><br><span> static void pch_set_acpi_mode(void)</span><br><span> {</span><br><span>@@ -44,7 +44,7 @@</span><br><span>        }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pmc_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pmc_init(struct device *dev)</span><br><span> {</span><br><span>  printk(BIOS_DEBUG, "pch: pmc_init\n");</span><br><span> </span><br><span>@@ -64,7 +64,7 @@</span><br><span>     pch_set_acpi_mode();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_pmc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_pmc_read_resources(struct device *dev)</span><br><span> {</span><br><span>   struct resource *res;</span><br><span> </span><br><span>diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c</span><br><span>index 421b6e3..9d0bdfc 100644</span><br><span>--- a/src/soc/intel/denverton_ns/sata.c</span><br><span>+++ b/src/soc/intel/denverton_ns/sata.c</span><br><span>@@ -68,7 +68,7 @@</span><br><span>       write32((void *)(abar + 0x04), reg32);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sata_enable(device_t dev) { /* TODO */ }</span><br><span style="color: hsl(120, 100%, 40%);">+static void sata_enable(struct device *dev) { /* TODO */ }</span><br><span> </span><br><span> static struct device_operations sata_ops = {</span><br><span>  .read_resources = pci_dev_read_resources,</span><br><span>diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c</span><br><span>index 0fcac3b..6b72a0c 100644</span><br><span>--- a/src/soc/intel/denverton_ns/systemagent.c</span><br><span>+++ b/src/soc/intel/denverton_ns/systemagent.c</span><br><span>@@ -38,7 +38,8 @@</span><br><span> #define _1ms 1</span><br><span> #define WAITING_STEP 100</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int get_pcie_bar(device_t dev, unsigned int index, u32 *base, u32 *len)</span><br><span style="color: hsl(120, 100%, 40%);">+static int get_pcie_bar(struct device *dev, unsigned int index, u32 *base,</span><br><span style="color: hsl(120, 100%, 40%);">+                        u32 *len)</span><br><span> {</span><br><span>       u32 pciexbar_reg;</span><br><span> </span><br><span>@@ -71,7 +72,7 @@</span><br><span>    return 0;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int get_bar(device_t dev, unsigned int index, u32 *base, u32 *len)</span><br><span style="color: hsl(120, 100%, 40%);">+static int get_bar(struct device *dev, unsigned int index, u32 *base, u32 *len)</span><br><span> {</span><br><span>    u32 bar;</span><br><span> </span><br><span>@@ -90,7 +91,7 @@</span><br><span> struct fixed_mmio_descriptor {</span><br><span>   unsigned int index;</span><br><span>  u32 size;</span><br><span style="color: hsl(0, 100%, 40%);">-       int (*get_resource)(device_t dev, unsigned int index, u32 *base,</span><br><span style="color: hsl(120, 100%, 40%);">+      int (*get_resource)(struct device *dev, unsigned int index, u32 *base,</span><br><span>                           u32 *size);</span><br><span>      const char *description;</span><br><span> };</span><br><span>@@ -104,7 +105,7 @@</span><br><span>  * Add all known fixed MMIO ranges that hang off the host bridge/memory</span><br><span>  * controller device.</span><br><span>  */</span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_add_fixed_mmio_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_add_fixed_mmio_resources(struct device *dev)</span><br><span> {</span><br><span>       int i;</span><br><span> </span><br><span>@@ -139,7 +140,7 @@</span><br><span>     const char *description;</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void read_map_entry(device_t dev, struct map_entry *entry,</span><br><span style="color: hsl(120, 100%, 40%);">+static void read_map_entry(struct device *dev, struct map_entry *entry,</span><br><span>                            uint64_t *result)</span><br><span> {</span><br><span>    uint64_t value;</span><br><span>@@ -189,14 +190,14 @@</span><br><span>              [TSEG_REG] = MAP_ENTRY_BASE_32(TSEGMB, "TSEGMB"),</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_read_map_entries(device_t dev, uint64_t *values)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_read_map_entries(struct device *dev, uint64_t *values)</span><br><span> {</span><br><span>     int i;</span><br><span>       for (i = 0; i < NUM_MAP_ENTRIES; i++)</span><br><span>             read_map_entry(dev, &memory_map[i], &values[i]);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_report_map_entries(device_t dev, uint64_t *values)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_report_map_entries(struct device *dev, uint64_t *values)</span><br><span> {</span><br><span>     int i;</span><br><span>       for (i = 0; i < NUM_MAP_ENTRIES; i++) {</span><br><span>@@ -205,7 +206,7 @@</span><br><span>     }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_add_dram_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_add_dram_resources(struct device *dev)</span><br><span> {</span><br><span>        unsigned long base_k, size_k;</span><br><span>        unsigned long touud_k;</span><br><span>@@ -297,7 +298,7 @@</span><br><span>                               (0x100000 - 0xc0000) >> 10);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void systemagent_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void systemagent_read_resources(struct device *dev)</span><br><span> {</span><br><span>       /* Read standard PCI resources. */</span><br><span>   pci_dev_read_resources(dev);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26587">change 26587</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.core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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I15e624b40d11f61a3870a6083be82d062690498d </div>
<div style="display:none"> Gerrit-Change-Number: 26587 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>