<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26541">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: Idf00c029331aba30c8bfca71546cad62ff6bb0a7<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/soc/intel/skylake/acpi.c<br>M src/soc/intel/skylake/chip.c<br>M src/soc/intel/skylake/chip_fsp20.c<br>M src/soc/intel/skylake/cpu.c<br>M src/soc/intel/skylake/finalize.c<br>M src/soc/intel/skylake/include/soc/acpi.h<br>M src/soc/intel/skylake/irq.c<br>M src/soc/intel/skylake/smmrelocate.c<br>M src/soc/intel/skylake/vr_config.c<br>9 files changed, 25 insertions(+), 25 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/26541/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c</span><br><span>index 43487c4..be1200b 100644</span><br><span>--- a/src/soc/intel/skylake/acpi.c</span><br><span>+++ b/src/soc/intel/skylake/acpi.c</span><br><span>@@ -495,13 +495,13 @@</span><br><span> acpigen_pop_len();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void generate_cpu_entries(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void generate_cpu_entries(struct device *device)</span><br><span> {</span><br><span> int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6;</span><br><span> int totalcores = dev_count_cpu();</span><br><span> int cores_per_package = get_cores_per_package();</span><br><span> int numcpus = totalcores/cores_per_package;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> config_t *config = dev->chip_info;</span><br><span> int is_s0ix_enable = config->s0ix_enable;</span><br><span> int max_c_state;</span><br><span>@@ -629,7 +629,7 @@</span><br><span> return current;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long southbridge_write_acpi_tables(device_t device,</span><br><span style="color: hsl(120, 100%, 40%);">+unsigned long southbridge_write_acpi_tables(struct device *device,</span><br><span> unsigned long current,</span><br><span> struct acpi_rsdp *rsdp)</span><br><span> {</span><br><span>@@ -640,7 +640,7 @@</span><br><span> return acpi_align_current(current);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_inject_dsdt(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void southbridge_inject_dsdt(struct device *device)</span><br><span> {</span><br><span> global_nvs_t *gnvs;</span><br><span> </span><br><span>diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c</span><br><span>index bb2ecaa..1e3fdc6 100644</span><br><span>--- a/src/soc/intel/skylake/chip.c</span><br><span>+++ b/src/soc/intel/skylake/chip.c</span><br><span>@@ -39,7 +39,7 @@</span><br><span> fsp_load();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span> assign_resources(dev->link_list);</span><br><span> }</span><br><span>@@ -60,7 +60,7 @@</span><br><span> #endif</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void soc_enable(struct device *dev)</span><br><span> {</span><br><span> /* Set the operations if it is a special bus type */</span><br><span> if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span>diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c</span><br><span>index a4867ea..bc78586 100644</span><br><span>--- a/src/soc/intel/skylake/chip_fsp20.c</span><br><span>+++ b/src/soc/intel/skylake/chip_fsp20.c</span><br><span>@@ -50,7 +50,7 @@</span><br><span> fsps_load(romstage_handoff_is_resume());</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span> assign_resources(dev->link_list);</span><br><span> }</span><br><span>@@ -75,7 +75,7 @@</span><br><span> #endif</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void soc_enable(struct device *dev)</span><br><span> {</span><br><span> /* Set the operations if it is a special bus type */</span><br><span> if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span>diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c</span><br><span>index d9e90d2..d386d1f 100644</span><br><span>--- a/src/soc/intel/skylake/cpu.c</span><br><span>+++ b/src/soc/intel/skylake/cpu.c</span><br><span>@@ -119,7 +119,7 @@</span><br><span> unsigned int power_unit;</span><br><span> unsigned int tdp, min_power, max_power, max_time, tdp_pl2;</span><br><span> u8 power_limit_1_val;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> config_t *conf = dev->chip_info;</span><br><span> </span><br><span> if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr))</span><br><span>@@ -241,7 +241,7 @@</span><br><span> </span><br><span> static void configure_thermal_target(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> config_t *conf = dev->chip_info;</span><br><span> msr_t msr;</span><br><span> </span><br><span>@@ -261,7 +261,7 @@</span><br><span> </span><br><span> static void configure_isst(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> config_t *conf = dev->chip_info;</span><br><span> msr_t msr;</span><br><span> </span><br><span>@@ -287,7 +287,7 @@</span><br><span> </span><br><span> static void configure_misc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> config_t *conf = dev->chip_info;</span><br><span> msr_t msr;</span><br><span> </span><br><span>@@ -419,7 +419,7 @@</span><br><span> }</span><br><span> </span><br><span> /* All CPUs including BSP will run the following function. */</span><br><span style="color: hsl(0, 100%, 40%);">-void soc_core_init(device_t cpu)</span><br><span style="color: hsl(120, 100%, 40%);">+void soc_core_init(struct device *cpu)</span><br><span> {</span><br><span> /* Clear out pending MCEs */</span><br><span> /* TODO(adurbin): This should only be done on a cold boot. Also, some</span><br><span>@@ -544,7 +544,7 @@</span><br><span> </span><br><span> int soc_fill_sgx_param(struct sgx_param *sgx_param)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> assert(dev != NULL);</span><br><span> config_t *conf = dev->chip_info;</span><br><span> </span><br><span>@@ -558,7 +558,7 @@</span><br><span> }</span><br><span> int soc_fill_vmx_param(struct vmx_param *vmx_param)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> assert(dev != NULL);</span><br><span> config_t *conf = dev->chip_info;</span><br><span> </span><br><span>diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c</span><br><span>index 25b7484..d75f810 100644</span><br><span>--- a/src/soc/intel/skylake/finalize.c</span><br><span>+++ b/src/soc/intel/skylake/finalize.c</span><br><span>@@ -39,7 +39,7 @@</span><br><span> #define PCR_PSFX_T0_SHDW_PCIEN 0x1C</span><br><span> #define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS (1 << 8)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_configure_endpoints(device_t dev, int epmask_id, uint32_t mask)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_configure_endpoints(struct device *dev, int epmask_id, uint32_t mask)</span><br><span> {</span><br><span> uint32_t reg32;</span><br><span> </span><br><span>@@ -49,7 +49,7 @@</span><br><span> </span><br><span> static void disable_sideband_access(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> u8 reg8;</span><br><span> uint32_t mask;</span><br><span> </span><br><span>@@ -82,7 +82,7 @@</span><br><span> </span><br><span> static void pch_disable_heci(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = PCH_DEV_P2SB;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = PCH_DEV_P2SB;</span><br><span> </span><br><span> /*</span><br><span> * if p2sb device 1f.1 is not present or hidden in devicetree</span><br><span>@@ -103,7 +103,7 @@</span><br><span> </span><br><span> static void pch_finalize_script(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> uint32_t reg32;</span><br><span> uint8_t *pmcbase;</span><br><span> config_t *config;</span><br><span>diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h</span><br><span>index 6d492ac..c39c066 100644</span><br><span>--- a/src/soc/intel/skylake/include/soc/acpi.h</span><br><span>+++ b/src/soc/intel/skylake/include/soc/acpi.h</span><br><span>@@ -29,8 +29,8 @@</span><br><span> void acpi_fill_in_fadt(acpi_fadt_t *fadt);</span><br><span> unsigned long acpi_madt_irq_overrides(unsigned long current);</span><br><span> void acpi_mainboard_gnvs(global_nvs_t *gnvs);</span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_inject_dsdt(device_t device);</span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long southbridge_write_acpi_tables(device_t device,</span><br><span style="color: hsl(120, 100%, 40%);">+void southbridge_inject_dsdt(struct device *device);</span><br><span style="color: hsl(120, 100%, 40%);">+unsigned long southbridge_write_acpi_tables(struct device *device,</span><br><span> unsigned long current, struct acpi_rsdp *rsdp);</span><br><span> unsigned long northbridge_write_acpi_tables(struct device *,</span><br><span> unsigned long current, struct acpi_rsdp *);</span><br><span>diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c</span><br><span>index 50119a5..146fcda 100644</span><br><span>--- a/src/soc/intel/skylake/irq.c</span><br><span>+++ b/src/soc/intel/skylake/irq.c</span><br><span>@@ -296,7 +296,7 @@</span><br><span> {</span><br><span> const config_t *config = dev->chip_info;</span><br><span> uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG];</span><br><span style="color: hsl(0, 100%, 40%);">- device_t irq_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *irq_dev;</span><br><span> </span><br><span> pch_interrupt_routing[0] = config->pirqa_routing;</span><br><span> pch_interrupt_routing[1] = config->pirqb_routing;</span><br><span>diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c</span><br><span>index b477b11..6a8e64b 100644</span><br><span>--- a/src/soc/intel/skylake/smmrelocate.c</span><br><span>+++ b/src/soc/intel/skylake/smmrelocate.c</span><br><span>@@ -180,7 +180,7 @@</span><br><span> write_smrr(relo_params);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void fill_in_relocation_params(device_t dev,</span><br><span style="color: hsl(120, 100%, 40%);">+static void fill_in_relocation_params(struct device *dev,</span><br><span> struct smm_relocation_params *params)</span><br><span> {</span><br><span> void *handler_base;</span><br><span>@@ -265,7 +265,7 @@</span><br><span> void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,</span><br><span> size_t *smm_save_state_size)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev = SA_DEV_ROOT;</span><br><span> </span><br><span> printk(BIOS_DEBUG, "Setting up SMI for CPU\n");</span><br><span> </span><br><span>diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c</span><br><span>index 0659d04..57affe5 100644</span><br><span>--- a/src/soc/intel/skylake/vr_config.c</span><br><span>+++ b/src/soc/intel/skylake/vr_config.c</span><br><span>@@ -160,7 +160,7 @@</span><br><span> },</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static uint16_t get_dev_id(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static uint16_t get_dev_id(struct device *dev)</span><br><span> {</span><br><span> return pci_read_config16(dev, PCI_DEVICE_ID);</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26541">change 26541</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Idf00c029331aba30c8bfca71546cad62ff6bb0a7 </div>
<div style="display:none"> Gerrit-Change-Number: 26541 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>