<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26542">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/quark: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I102c9b9b1066064589149388d5ebbcd6d0d81fa7<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/soc/intel/quark/chip.c<br>M src/soc/intel/quark/ehci.c<br>M src/soc/intel/quark/gpio_i2c.c<br>M src/soc/intel/quark/include/soc/ramstage.h<br>M src/soc/intel/quark/lpc.c<br>M src/soc/intel/quark/northcluster.c<br>M src/soc/intel/quark/spi.c<br>7 files changed, 8 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/26542/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c</span><br><span>index 91ab8f5..2f8b826 100644</span><br><span>--- a/src/soc/intel/quark/chip.c</span><br><span>+++ b/src/soc/intel/quark/chip.c</span><br><span>@@ -121,7 +121,7 @@</span><br><span> fsp_silicon_init(romstage_handoff_is_resume());</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span> assign_resources(dev->link_list);</span><br><span> }</span><br><span>@@ -132,7 +132,7 @@</span><br><span> .scan_bus = pci_domain_scan_bus,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void chip_enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void chip_enable_dev(struct device *dev)</span><br><span> {</span><br><span> </span><br><span> /* Set the operations if it is a special bus type */</span><br><span>diff --git a/src/soc/intel/quark/ehci.c b/src/soc/intel/quark/ehci.c</span><br><span>index 2524fa7..1230629 100644</span><br><span>--- a/src/soc/intel/quark/ehci.c</span><br><span>+++ b/src/soc/intel/quark/ehci.c</span><br><span>@@ -107,7 +107,7 @@</span><br><span> REG_SCRIPT_END</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void init(struct device *dev)</span><br><span> {</span><br><span> if ((dev->path.pci.devfn & 7) == EHCI_FUNC) {</span><br><span> printk(BIOS_INFO, "Initializing USB PLLs\n");</span><br><span>diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c</span><br><span>index 1a9c5ae..100257b 100644</span><br><span>--- a/src/soc/intel/quark/gpio_i2c.c</span><br><span>+++ b/src/soc/intel/quark/gpio_i2c.c</span><br><span>@@ -24,7 +24,7 @@</span><br><span> #include <soc/ramstage.h></span><br><span> #include <soc/reg_access.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-__weak void mainboard_gpio_i2c_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+__weak void mainboard_gpio_i2c_init(struct device *dev)</span><br><span> {</span><br><span> /* Initialize any of the GPIOs or I2C devices */</span><br><span> printk(BIOS_SPEW, "WEAK; mainboard_gpio_i2c_init\n");</span><br><span>diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>index 9187487..4ad0fedc 100644</span><br><span>--- a/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>+++ b/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>@@ -24,7 +24,7 @@</span><br><span> #endif</span><br><span> #include <soc/QuarkNcSocId.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void mainboard_gpio_i2c_init(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void mainboard_gpio_i2c_init(struct device *dev);</span><br><span> #if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)</span><br><span> void fsp_silicon_init(bool s3wake);</span><br><span> #endif</span><br><span>diff --git a/src/soc/intel/quark/lpc.c b/src/soc/intel/quark/lpc.c</span><br><span>index aefbaf6..809122b 100644</span><br><span>--- a/src/soc/intel/quark/lpc.c</span><br><span>+++ b/src/soc/intel/quark/lpc.c</span><br><span>@@ -22,7 +22,7 @@</span><br><span> #include <soc/pm.h></span><br><span> #include <soc/ramstage.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pmc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pmc_read_resources(struct device *dev)</span><br><span> {</span><br><span> unsigned int index = 0;</span><br><span> struct resource *res;</span><br><span>diff --git a/src/soc/intel/quark/northcluster.c b/src/soc/intel/quark/northcluster.c</span><br><span>index b52c3b7..124d767 100644</span><br><span>--- a/src/soc/intel/quark/northcluster.c</span><br><span>+++ b/src/soc/intel/quark/northcluster.c</span><br><span>@@ -24,7 +24,7 @@</span><br><span> </span><br><span> #define RES_IN_KIB(r) ((r) >> 10)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void nc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void nc_read_resources(struct device *dev)</span><br><span> {</span><br><span> unsigned long base_k;</span><br><span> int index = 0;</span><br><span>diff --git a/src/soc/intel/quark/spi.c b/src/soc/intel/quark/spi.c</span><br><span>index 6c1aca9..4b011b7 100644</span><br><span>--- a/src/soc/intel/quark/spi.c</span><br><span>+++ b/src/soc/intel/quark/spi.c</span><br><span>@@ -232,7 +232,7 @@</span><br><span> uint32_t bios_control;</span><br><span> struct spi_context *context;</span><br><span> volatile struct flash_ctrlr *ctrlr;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> uint32_t rcba;</span><br><span> </span><br><span> /* Determine the base address of the SPI flash controller */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26542">change 26542</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I102c9b9b1066064589149388d5ebbcd6d0d81fa7 </div>
<div style="display:none"> Gerrit-Change-Number: 26542 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>