<p>Martin Roth has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26524">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/google/kahlee: Add careena variant<br><br>Add Careena variant, based on the grunt board.<br><br>BUG=b:80106042<br>TEST=Build Careena<br><br>Change-Id: I87a24f6d8115aacf5b21181f3820cf2718ad252a<br>Signed-off-by: Martin Roth <martinroth@google.com><br>---<br>M src/mainboard/google/kahlee/Kconfig<br>M src/mainboard/google/kahlee/Kconfig.name<br>A src/mainboard/google/kahlee/variants/careena/Makefile.inc<br>A src/mainboard/google/kahlee/variants/careena/chromeos.fmd<br>A src/mainboard/google/kahlee/variants/careena/devicetree.cb<br>A src/mainboard/google/kahlee/variants/careena/include/variant/acpi/gpe.asl<br>A src/mainboard/google/kahlee/variants/careena/include/variant/acpi/mainboard.asl<br>A src/mainboard/google/kahlee/variants/careena/include/variant/acpi/routing.asl<br>A src/mainboard/google/kahlee/variants/careena/include/variant/acpi/sleep.asl<br>A src/mainboard/google/kahlee/variants/careena/include/variant/acpi/thermal.asl<br>A src/mainboard/google/kahlee/variants/careena/include/variant/ec.h<br>A src/mainboard/google/kahlee/variants/careena/include/variant/gpio.h<br>A src/mainboard/google/kahlee/variants/careena/include/variant/thermal.h<br>A src/mainboard/google/kahlee/variants/careena/mainboard.c<br>A src/mainboard/google/kahlee/variants/careena/romstage.c<br>15 files changed, 443 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/26524/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig</span><br><span>index 24881b5..8551698 100644</span><br><span>--- a/src/mainboard/google/kahlee/Kconfig</span><br><span>+++ b/src/mainboard/google/kahlee/Kconfig</span><br><span>@@ -18,8 +18,8 @@</span><br><span> select SOC_AMD_STONEYRIDGE_FT4</span><br><span> select ALWAYS_LOAD_OPROM</span><br><span> select ALWAYS_RUN_OPROM</span><br><span style="color: hsl(0, 100%, 40%);">- select BOARD_ROMSIZE_KB_16384 if BOARD_GOOGLE_GRUNT</span><br><span> select BOARD_ROMSIZE_KB_8192 if BOARD_GOOGLE_KAHLEE</span><br><span style="color: hsl(120, 100%, 40%);">+ select BOARD_ROMSIZE_KB_16384</span><br><span> select DRIVERS_I2C_GENERIC</span><br><span> select DRIVERS_PS2_KEYBOARD</span><br><span> select EC_GOOGLE_CHROMEEC</span><br><span>@@ -36,7 +36,7 @@</span><br><span> select SOC_AMD_PSP_SELECTABLE_SMU_FW</span><br><span> select SOC_AMD_SMU_FANLESS</span><br><span> select HAVE_ACPI_RESUME</span><br><span style="color: hsl(0, 100%, 40%);">- select DRIVERS_GENERIC_BH720 if BOARD_GOOGLE_GRUNT</span><br><span style="color: hsl(120, 100%, 40%);">+ select DRIVERS_GENERIC_BH720 if !BOARD_GOOGLE_KAHLEE</span><br><span> </span><br><span> if BOARD_GOOGLE_BASEBOARD_KAHLEE</span><br><span> </span><br><span>@@ -46,11 +46,13 @@</span><br><span> </span><br><span> config VARIANT_DIR</span><br><span> string</span><br><span style="color: hsl(120, 100%, 40%);">+ default "careena" if BOARD_GOOGLE_CAREENA</span><br><span> default "grunt" if BOARD_GOOGLE_GRUNT</span><br><span> default "kahlee" if BOARD_GOOGLE_KAHLEE</span><br><span> </span><br><span> config MAINBOARD_PART_NUMBER</span><br><span> string</span><br><span style="color: hsl(120, 100%, 40%);">+ default "Careena" if BOARD_GOOGLE_CAREENA</span><br><span> default "Grunt" if BOARD_GOOGLE_GRUNT</span><br><span> default "Kahlee" if BOARD_GOOGLE_KAHLEE</span><br><span> </span><br><span>@@ -97,6 +99,7 @@</span><br><span> config GBB_HWID</span><br><span> string</span><br><span> depends on CHROMEOS</span><br><span style="color: hsl(120, 100%, 40%);">+ default "CAREENA TEST 8777" if BOARD_GOOGLE_CAREENA</span><br><span> default "GRUNT TEST 8296" if BOARD_GOOGLE_GRUNT</span><br><span> default "KAHLEE TEST 6421" if BOARD_GOOGLE_KAHLEE</span><br><span> </span><br><span>diff --git a/src/mainboard/google/kahlee/Kconfig.name b/src/mainboard/google/kahlee/Kconfig.name</span><br><span>index 9648057..98f9be1 100644</span><br><span>--- a/src/mainboard/google/kahlee/Kconfig.name</span><br><span>+++ b/src/mainboard/google/kahlee/Kconfig.name</span><br><span>@@ -1,5 +1,8 @@</span><br><span> comment "Kahlee"</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config BOARD_GOOGLE_CAREENA</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "-> Careena"</span><br><span style="color: hsl(120, 100%, 40%);">+ select BOARD_GOOGLE_BASEBOARD_KAHLEE</span><br><span> config BOARD_GOOGLE_GRUNT</span><br><span> bool "-> Grunt"</span><br><span> select BOARD_GOOGLE_BASEBOARD_KAHLEE</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/Makefile.inc b/src/mainboard/google/kahlee/variants/careena/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..319ab4e</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/Makefile.inc</span><br><span>@@ -0,0 +1,38 @@</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# Copyright (C) 2017 Google, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+# it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+# the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+# but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+# GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += romstage.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += mainboard.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+LIB_SPD_DEPS = $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/spd/$(f).spd.hex)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES = hynix-H5AN8G6NAFR-UH # 0b0000</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += hynix-H5ANAG6NAMR-UH # 0b0001</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += micron-MT40A512M16JY-083E:B # 0b0010</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += micron-MT40A1G16KNR-075:E # 0b0011</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += samsung-K4A8G165WB-BCRC # 0b0100</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += samsung-K4AAG165WB-MCRC # 0b0101</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b0110</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b0111</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1000</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1001</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1010</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1011</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1100</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1101</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1110</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += empty # 0b1111</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/chromeos.fmd b/src/mainboard/google/kahlee/variants/careena/chromeos.fmd</span><br><span>new file mode 100644</span><br><span>index 0000000..336aced</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/chromeos.fmd</span><br><span>@@ -0,0 +1,41 @@</span><br><span style="color: hsl(120, 100%, 40%);">+FLASH@0xFF000000 0x1000000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ SI_BIOS@0x0 0x1000000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ UNIFIED_MRC_CACHE@0x0 0x21000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RECOVERY_MRC_CACHE@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_MRC_CACHE@0x10000 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_VAR_MRC_CACHE@0x20000 0x1000</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_SECTION_A@0x21000 0x21E000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ VBLOCK_A@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+ FW_MAIN_A(CBFS)@0x10000 0x20DFC0</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_FWID_A@0x21DFC0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_SECTION_B@0x23F000 0x21E000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ VBLOCK_B@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+ FW_MAIN_B(CBFS)@0x10000 0x20DFC0</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_FWID_B@0x21DFC0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_ELOG@0x45D000 0x4000</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_SHARED@0x461000 0x4000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ SHARED_DATA@0x0 0x2000</span><br><span style="color: hsl(120, 100%, 40%);">+ VBLOCK_DEV@0x2000 0x2000</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_VPD@0x465000 0x2000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_NVRAM@0x467000 0x5000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_UNUSED@0x46C000 0x14000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_LEGACY@0x480000 0x780000</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ WP_RO@0xC00000 0x400000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_VPD@0x0 0x4000</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_UNUSED@0x4000 0x17B000</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_SECTION@0x17F000 0x281000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ FMAP@0x0 0x800</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_FRID@0x800 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_FRID_PAD@0x840 0x7c0</span><br><span style="color: hsl(120, 100%, 40%);">+ GBB@0x1000 0x70000</span><br><span style="color: hsl(120, 100%, 40%);">+ COREBOOT(CBFS)@0x71000 0x210000</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb</span><br><span>new file mode 100644</span><br><span>index 0000000..3863100</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb</span><br><span>@@ -0,0 +1,164 @@</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# Copyright (C) 2015-2017 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+# it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+# the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+# This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+# but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+# GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+#</span><br><span style="color: hsl(120, 100%, 40%);">+chip soc/amd/stoneyridge</span><br><span style="color: hsl(120, 100%, 40%);">+ register "spd_addr_lookup" = "</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0</span><br><span style="color: hsl(120, 100%, 40%);">+ }"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "uma_size" = "32 * MiB"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable I2C0 for audio, USB3 hub at 400kHz</span><br><span style="color: hsl(120, 100%, 40%);">+ register "i2c[0]" = "{</span><br><span style="color: hsl(120, 100%, 40%);">+ .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rise_time_ns = 95,</span><br><span style="color: hsl(120, 100%, 40%);">+ .fall_time_ns = 3,</span><br><span style="color: hsl(120, 100%, 40%);">+ }"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable I2C1 for H1 at 400kHz</span><br><span style="color: hsl(120, 100%, 40%);">+ register "i2c[1]" = "{</span><br><span style="color: hsl(120, 100%, 40%);">+ .early_init = 1,</span><br><span style="color: hsl(120, 100%, 40%);">+ .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rise_time_ns = 84,</span><br><span style="color: hsl(120, 100%, 40%);">+ .fall_time_ns = 4,</span><br><span style="color: hsl(120, 100%, 40%);">+ }"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable I2C2 for trackpad, pen at 400kHz</span><br><span style="color: hsl(120, 100%, 40%);">+ register "i2c[2]" = "{</span><br><span style="color: hsl(120, 100%, 40%);">+ .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rise_time_ns = 117,</span><br><span style="color: hsl(120, 100%, 40%);">+ .fall_time_ns = 113,</span><br><span style="color: hsl(120, 100%, 40%);">+ }"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable I2C3 for touchscreen at 400kHz</span><br><span style="color: hsl(120, 100%, 40%);">+ register "i2c[3]" = "{</span><br><span style="color: hsl(120, 100%, 40%);">+ .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rise_time_ns = 82,</span><br><span style="color: hsl(120, 100%, 40%);">+ .fall_time_ns = 67,</span><br><span style="color: hsl(120, 100%, 40%);">+ }"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ device cpu_cluster 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ device lapic 10 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ device domain 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ subsystemid 0x1022 0x1410 inherit</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.0 on end # Root Complex</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1.1 on end # Internal Multimedia</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.0 on end # PCIe Host Bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.1 on end #</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.2 on end #</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.3 on end #</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.4 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/generic/bayhub</span><br><span style="color: hsl(120, 100%, 40%);">+ register "power_saving" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 00.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end #</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.5 on end #</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 8.0 on end # PSP</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 9.0 on end # PCIe Host Bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 9.2 on end # HDA</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 10.0 on end # xHCI</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 11.0 on end # SATA</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 12.0 on end # EHCI</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 14.0 on # SMbus</span><br><span style="color: hsl(120, 100%, 40%);">+ end # SMbus</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 14.3 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip ec/google/chromeec</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c09.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end # LPC</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 14.7 on end # SD</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.1 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.2 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.3 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.4 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 18.5 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end #domain</span><br><span style="color: hsl(120, 100%, 40%);">+ device mmio 0xfedc2000 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/generic/adau7002</span><br><span style="color: hsl(120, 100%, 40%);">+ device generic 0.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/i2c/da7219</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_14)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "btn_cfg" = "50"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "mic_det_thr" = "500"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "jack_ins_deb" = "20"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "jack_det_rate" = ""32ms_64ms""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "jack_rem_deb" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "a_d_btn_thr" = "0xa"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "d_b_btn_thr" = "0x16"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "b_c_btn_thr" = "0x21"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "c_mic_btn_thr" = "0x3e"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "btn_avg" = "4"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "adc_1bit_rpt" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "micbias_lvl" = "2600"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "mic_amp_in_sel" = ""diff""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "mclk_name" = ""oscout1""</span><br><span style="color: hsl(120, 100%, 40%);">+ device i2c 1a on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/generic/max98357a</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_119)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sdmode_delay" = "5"</span><br><span style="color: hsl(120, 100%, 40%);">+ device generic 0.1 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ device mmio 0xfedc3000 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/i2c/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ register "hid" = ""GOOG0005""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "desc" = ""Cr50 TPM""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)"</span><br><span style="color: hsl(120, 100%, 40%);">+ device i2c 50 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ device mmio 0xfedc4000 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/i2c/generic</span><br><span style="color: hsl(120, 100%, 40%);">+ register "hid" = ""ELAN0000""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "desc" = ""ELAN Touchpad""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "wake" = "7"</span><br><span style="color: hsl(120, 100%, 40%);">+ device i2c 15 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ device mmio 0xfedc5000 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/i2c/generic</span><br><span style="color: hsl(120, 100%, 40%);">+ register "hid" = ""RAYD0001""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "desc" = ""Raydium Touchscreen""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "probed" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "reset_delay_ms" = "20"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "enable_delay_ms" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "has_power_resource" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ device i2c 39 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/i2c/generic</span><br><span style="color: hsl(120, 100%, 40%);">+ register "hid" = ""ELAN0001""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "desc" = ""ELAN Touchscreen""</span><br><span style="color: hsl(120, 100%, 40%);">+ register "probed" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "reset_delay_ms" = "20"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "enable_delay_ms" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "has_power_resource" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ device i2c 10 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+end #chip soc/amd/stoneyridge</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/gpe.asl b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/gpe.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..0a08774</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/gpe.asl</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Sage Electronic Engineering, LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/gpe.asl></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/mainboard.asl b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/mainboard.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..4f91d72</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/mainboard.asl</span><br><span>@@ -0,0 +1,17 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Sage Electronic Engineering, LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/mainboard.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/audio.asl></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/routing.asl b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/routing.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..233494f</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/routing.asl</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Sage Electronic Engineering, LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/routing.asl></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/sleep.asl b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/sleep.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..c5a1557</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/sleep.asl</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Sage Electronic Engineering, LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/sleep.asl></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/thermal.asl b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/thermal.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..77137bb</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/acpi/thermal.asl</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Sage Electronic Engineering, LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/acpi/thermal.asl></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/ec.h b/src/mainboard/google/kahlee/variants/careena/include/variant/ec.h</span><br><span>new file mode 100644</span><br><span>index 0000000..96388ae</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/ec.h</span><br><span>@@ -0,0 +1,4 @@</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/ec.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Enable EC backed Keyboard Backlight in ACPI */</span><br><span style="color: hsl(120, 100%, 40%);">+#define EC_ENABLE_KEYBOARD_BACKLIGHT</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/careena/include/variant/gpio.h</span><br><span>new file mode 100644</span><br><span>index 0000000..5a6b540</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/gpio.h</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/gpio.h></span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/include/variant/thermal.h b/src/mainboard/google/kahlee/variants/careena/include/variant/thermal.h</span><br><span>new file mode 100644</span><br><span>index 0000000..2c983bb</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/include/variant/thermal.h</span><br><span>@@ -0,0 +1,38 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef THERMAL_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define THERMAL_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Stoney Ridge Thermal Requirements 12 (6W)</span><br><span style="color: hsl(120, 100%, 40%);">+ * TDP (W) 6</span><br><span style="color: hsl(120, 100%, 40%);">+ * T die,max (°C) 95</span><br><span style="color: hsl(120, 100%, 40%);">+ * T ctl,max 85</span><br><span style="color: hsl(120, 100%, 40%);">+ * T die,lmt (default) 90</span><br><span style="color: hsl(120, 100%, 40%);">+ * T ctl,lmt (default) 80</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Control TDP Settings */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_SENSOR_ID 0 /* EC TIN0 */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Temperature which OS will shutdown at */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CRITICAL_TEMPERATURE 94</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Temperature which OS will throttle CPU */</span><br><span style="color: hsl(120, 100%, 40%);">+#define PASSIVE_TEMPERATURE 85</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/mainboard.c b/src/mainboard/google/kahlee/variants/careena/mainboard.c</span><br><span>new file mode 100644</span><br><span>index 0000000..c873299</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/mainboard.c</span><br><span>@@ -0,0 +1,27 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Google LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <ec/google/chromeec/ec.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/variants.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+uint8_t variant_board_sku(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ static int sku = -1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (sku == -1)</span><br><span style="color: hsl(120, 100%, 40%);">+ sku = google_chromeec_get_sku_id();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return sku;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/careena/romstage.c b/src/mainboard/google/kahlee/variants/careena/romstage.c</span><br><span>new file mode 100644</span><br><span>index 0000000..2b8baf8</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/romstage.c</span><br><span>@@ -0,0 +1,26 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Google, LLC.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/variants.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <ec/google/chromeec/ec.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void variant_romstage_entry(int s3_resume)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t sku = google_chromeec_get_sku_id();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Based on SKU, turn on keyboard backlight to show system is booting */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (sku <= 6 && !s3_resume)</span><br><span style="color: hsl(120, 100%, 40%);">+ google_chromeec_kbbacklight(75);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26524">change 26524</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26524"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I87a24f6d8115aacf5b21181f3820cf2718ad252a </div>
<div style="display:none"> Gerrit-Change-Number: 26524 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Roth <martinroth@google.com> </div>