<p>Julius Werner has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26489">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">HACK: Julius' extra hacks for Cheza bring-up images<br><br>Not for review or submission. Just sharing some WIP code.<br><br>Change-Id: Ie59bc30bab88abfa17fa031b1be814c834192891<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M src/arch/arm64/arm_tf.c<br>M src/mainboard/google/cheza/Kconfig<br>M src/mainboard/google/cheza/Makefile.inc<br>M src/mainboard/google/cheza/mainboard.c<br>M src/mainboard/google/cheza/qupv3_config.c<br>M src/soc/qualcomm/sdm845/Makefile.inc<br>M src/soc/qualcomm/sdm845/include/soc/memlayout.ld<br>7 files changed, 22 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/26489/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c</span><br><span>index a172d42..f658ffe 100644</span><br><span>--- a/src/arch/arm64/arm_tf.c</span><br><span>+++ b/src/arch/arm64/arm_tf.c</span><br><span>@@ -88,6 +88,7 @@</span><br><span>    /* MMU disable will flush cache, so passed params land in memory. */</span><br><span>         raw_write_daif(SPSR_EXCEPTION_MASK);</span><br><span>         mmu_disable();</span><br><span style="color: hsl(120, 100%, 40%);">+        dcache_clean_invalidate_all();</span><br><span>       bl31_entry(&bl31_params, bl31_plat_params);</span><br><span>      die("BL31 returned!");</span><br><span> }</span><br><span>diff --git a/src/mainboard/google/cheza/Kconfig b/src/mainboard/google/cheza/Kconfig</span><br><span>index 8b1771f..9882b59 100644</span><br><span>--- a/src/mainboard/google/cheza/Kconfig</span><br><span>+++ b/src/mainboard/google/cheza/Kconfig</span><br><span>@@ -12,7 +12,6 @@</span><br><span>       select SPI_FLASH</span><br><span>     select SPI_FLASH_WINBOND</span><br><span>     select MAINBOARD_HAS_CHROMEOS</span><br><span style="color: hsl(0, 100%, 40%);">-   select HAVE_LINEAR_FRAMEBUFFER</span><br><span> </span><br><span> config CONSOLE_UART_ADDR</span><br><span>       hex</span><br><span>diff --git a/src/mainboard/google/cheza/Makefile.inc b/src/mainboard/google/cheza/Makefile.inc</span><br><span>index b1f5190..9abc08a 100644</span><br><span>--- a/src/mainboard/google/cheza/Makefile.inc</span><br><span>+++ b/src/mainboard/google/cheza/Makefile.inc</span><br><span>@@ -15,3 +15,4 @@</span><br><span> ramstage-y += chromeos.c</span><br><span> ramstage-y += mainboard.c</span><br><span> ramstage-y += framebuffer.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += qupv3_config.c</span><br><span>diff --git a/src/mainboard/google/cheza/mainboard.c b/src/mainboard/google/cheza/mainboard.c</span><br><span>index fffa9c3..f47d5d7 100644</span><br><span>--- a/src/mainboard/google/cheza/mainboard.c</span><br><span>+++ b/src/mainboard/google/cheza/mainboard.c</span><br><span>@@ -15,6 +15,7 @@</span><br><span> </span><br><span> #include <device/device.h></span><br><span> #include <bootblock_common.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/qupv3_fw_config.h></span><br><span> #include <timestamp.h></span><br><span> #include <soc/usb.h></span><br><span> </span><br><span>@@ -29,7 +30,16 @@</span><br><span> </span><br><span> static void mainboard_init(struct device *dev)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+      qupv3_fw_init();</span><br><span>     setup_usb();</span><br><span style="color: hsl(120, 100%, 40%);">+  write32((void *)0x117048, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x1172a8, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x1173d8, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x117638, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x11828c, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x1183bc, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x1184ec, 0x21);</span><br><span style="color: hsl(120, 100%, 40%);">+      write32((void *)0x11874c, 0x21);</span><br><span> }</span><br><span> </span><br><span> static void mainboard_enable(struct device *dev)</span><br><span>diff --git a/src/mainboard/google/cheza/qupv3_config.c b/src/mainboard/google/cheza/qupv3_config.c</span><br><span>index 6d1d08f..5473dac 100644</span><br><span>--- a/src/mainboard/google/cheza/qupv3_config.c</span><br><span>+++ b/src/mainboard/google/cheza/qupv3_config.c</span><br><span>@@ -18,13 +18,17 @@</span><br><span> struct se_cfg se_mappings[QUPV3_SE_MAX] =</span><br><span> {</span><br><span>       {QUPV3_0_SE0, SE_PROTOCOL_SPI,  MIXED  , true }, /* Fingerprint SPI */</span><br><span style="color: hsl(0, 100%, 40%);">-  {QUPV3_0_SE2, SE_PROTOCOL_I2C,  MIXED  , true }, /* Touch I2C */</span><br><span style="color: hsl(120, 100%, 40%);">+      {QUPV3_0_SE2, SE_PROTOCOL_SPI,  MIXED  , true }, /* ESIM SPI */</span><br><span>      {QUPV3_0_SE3, SE_PROTOCOL_I2C,  MIXED  , true }, /* EDP Bridge I2C */</span><br><span style="color: hsl(0, 100%, 40%);">-   {QUPV3_0_SE5, SE_PROTOCOL_I2C,  MIXED  , true }, /* HP (codec) I2C */</span><br><span style="color: hsl(120, 100%, 40%);">+ {QUPV3_0_SE5, SE_PROTOCOL_SPI,  MIXED  , true }, /* H1 SPI */</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef __RAMSTAGE__</span><br><span>  {QUPV3_0_SE6, SE_PROTOCOL_UART, FIFO   , false}, /* BT UART */</span><br><span>       {QUPV3_1_SE1, SE_PROTOCOL_UART, FIFO   , false}, /* Debug UART */</span><br><span style="color: hsl(0, 100%, 40%);">-       {QUPV3_1_SE3, SE_PROTOCOL_SPI,  MIXED  , true }, /* ESIM SPI */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+       {QUPV3_1_SE2, SE_PROTOCOL_SPI,  MIXED  , true }, /* EC SPI */</span><br><span style="color: hsl(120, 100%, 40%);">+ {QUPV3_1_SE3, SE_PROTOCOL_I2C,  MIXED  , true }, /* Pen Detect I2C */</span><br><span>        {QUPV3_1_SE4, SE_PROTOCOL_I2C,  MIXED  , true }, /* Speaker Amps I2C */</span><br><span style="color: hsl(120, 100%, 40%);">+       {QUPV3_1_SE6, SE_PROTOCOL_I2C,  MIXED  , true }, /* Touch I2C */</span><br><span> };</span><br><span> </span><br><span> struct se_cfg *qupv3_get_se_mappings(void)</span><br><span>diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc</span><br><span>index 1864469..9fbd1e9 100644</span><br><span>--- a/src/soc/qualcomm/sdm845/Makefile.inc</span><br><span>+++ b/src/soc/qualcomm/sdm845/Makefile.inc</span><br><span>@@ -45,6 +45,7 @@</span><br><span> ramstage-y += gpio.c</span><br><span> ramstage-y += clock.c</span><br><span> ramstage-y += aop_load_reset.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += qupv3_fw_config.c</span><br><span> ramstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span> ramstage-$(CONFIG_SPI_FLASH) += qspi.c</span><br><span> ramstage-$(CONFIG_QC_FLASH_SIMULATE_SDCARD) += fs_sdcard.c</span><br><span>diff --git a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld</span><br><span>index a39760b..3ae2d82 100644</span><br><span>--- a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld</span><br><span>+++ b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld</span><br><span>@@ -42,8 +42,8 @@</span><br><span> </span><br><span>      BSRAM_START(0x14800000)</span><br><span>      REGION(fw_reserved2, 0x14800000, 0x16000, 4096)</span><br><span style="color: hsl(0, 100%, 40%);">- BOOTBLOCK(0x14816000, 32K)</span><br><span style="color: hsl(0, 100%, 40%);">-      TTB(0x1481E000, 64K)</span><br><span style="color: hsl(120, 100%, 40%);">+  BOOTBLOCK(0x14816000, 40K)</span><br><span style="color: hsl(120, 100%, 40%);">+    TTB(0x14820000, 56K)</span><br><span>         VBOOT2_WORK(0x1482E000, 16K)</span><br><span>         STACK(0x14832000, 16K)</span><br><span>       TIMESTAMP(0x14836000, 1K)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26489">change 26489</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26489"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie59bc30bab88abfa17fa031b1be814c834192891 </div>
<div style="display:none"> Gerrit-Change-Number: 26489 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>