<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26461">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src: Use "foo *bar" instead of "foo* bar"<br><br>Change-Id: Ib2bb6cc80ac2bdc389c60c7ffac4bba937f0fca8<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/drivers/amd/agesa/eventlog.c<br>M src/mainboard/asus/kfsn4-dre/romstage.c<br>M src/mainboard/asus/kfsn4-dre_k8/romstage.c<br>M src/mainboard/intel/kunimitsu/spd/spd_util.c<br>M src/northbridge/amd/amdfam10/northbridge.c<br>M src/northbridge/amd/amdht/h3finit.h<br>M src/northbridge/amd/pi/agesawrapper_call.h<br>M src/northbridge/intel/fsp_sandybridge/raminit.c<br>M src/northbridge/intel/haswell/raminit.c<br>M src/northbridge/intel/sandybridge/raminit_mrc.c<br>M src/soc/intel/baytrail/include/soc/gpio.h<br>M src/soc/intel/fsp_baytrail/include/soc/gpio.h<br>M src/soc/nvidia/tegra210/clock.c<br>M src/soc/nvidia/tegra210/include/soc/clock.h<br>M src/southbridge/amd/sb700/sm.c<br>M src/southbridge/intel/bd82x6x/me_8.x.c<br>M src/southbridge/intel/fsp_bd82x6x/me_8.x.c<br>M src/southbridge/intel/fsp_i89xx/me_8.x.c<br>18 files changed, 38 insertions(+), 38 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/26461/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c</span><br><span>index 33e5590..f6f6383 100644</span><br><span>--- a/src/drivers/amd/agesa/eventlog.c</span><br><span>+++ b/src/drivers/amd/agesa/eventlog.c</span><br><span>@@ -84,9 +84,9 @@</span><br><span>  * 0x6 = AGESA_CRITICAL</span><br><span>  * 0x7 = AGESA_FATAL</span><br><span>  */</span><br><span style="color: hsl(0, 100%, 40%);">-static const char * decodeAGESA_STATUS(AGESA_STATUS sret)</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *decodeAGESA_STATUS(AGESA_STATUS sret)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-     const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",</span><br><span style="color: hsl(120, 100%, 40%);">+     const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",</span><br><span>                                    "AGESA_BOUNDS_CHK", "AGESA_ALERT",</span><br><span>                                       "AGESA_WARNING", "AGESA_ERROR",</span><br><span>                                  "AGESA_CRITICAL", "AGESA_FATAL"</span><br><span>diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c</span><br><span>index 105dacf..2249139 100644</span><br><span>--- a/src/mainboard/asus/kfsn4-dre/romstage.c</span><br><span>+++ b/src/mainboard/asus/kfsn4-dre/romstage.c</span><br><span>@@ -118,7 +118,7 @@</span><br><span>   RES_PCI_IO, PCI_ADDR(0, 0, 0, 0xe0), ~(0x00000000), 0x00010000, /* Enable MSI mapping on host bridge -- without this Linux cannot use the network device MSI interrupts! */</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void ck804_control(const unsigned int* values, u32 size, uint8_t bus_unit_id)</span><br><span style="color: hsl(120, 100%, 40%);">+static void ck804_control(const unsigned int *values, u32 size, uint8_t bus_unit_id)</span><br><span> {</span><br><span>         unsigned busn[4], io_base[4];</span><br><span>        int i, ck804_num = 0;</span><br><span>diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c</span><br><span>index a404b06..a7ed9f7 100644</span><br><span>--- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c</span><br><span>+++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c</span><br><span>@@ -122,7 +122,7 @@</span><br><span>     RES_PCI_IO, PCI_ADDR(0, 0, 0, 0xe0), ~(0x00000000), 0x00010000, /* Enable MSI mapping on host bridge -- without this Linux cannot use the network device MSI interrupts! */</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void ck804_control(const unsigned int* values, u32 size, uint8_t bus_unit_id)</span><br><span style="color: hsl(120, 100%, 40%);">+static void ck804_control(const unsigned int *values, u32 size, uint8_t bus_unit_id)</span><br><span> {</span><br><span>         unsigned busn[4], io_base[4];</span><br><span>        int i, ck804_num = 0;</span><br><span>diff --git a/src/mainboard/intel/kunimitsu/spd/spd_util.c b/src/mainboard/intel/kunimitsu/spd/spd_util.c</span><br><span>index a17b519..676f84d 100644</span><br><span>--- a/src/mainboard/intel/kunimitsu/spd/spd_util.c</span><br><span>+++ b/src/mainboard/intel/kunimitsu/spd/spd_util.c</span><br><span>@@ -75,7 +75,7 @@</span><br><span> </span><br><span> uintptr_t mainboard_get_spd_data(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       char* spd_file;</span><br><span style="color: hsl(120, 100%, 40%);">+       char *spd_file;</span><br><span>      int spd_index, spd_span;</span><br><span>     size_t spd_file_len;</span><br><span> </span><br><span>diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c</span><br><span>index f50c2ee..e647579 100644</span><br><span>--- a/src/northbridge/amd/amdfam10/northbridge.c</span><br><span>+++ b/src/northbridge/amd/amdfam10/northbridge.c</span><br><span>@@ -1040,7 +1040,7 @@</span><br><span> }</span><br><span> </span><br><span> #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)</span><br><span style="color: hsl(0, 100%, 40%);">-static int amdfam10_get_smbios_data16(int* count, int handle, unsigned long *current)</span><br><span style="color: hsl(120, 100%, 40%);">+static int amdfam10_get_smbios_data16(int *count, int handle, unsigned long *current)</span><br><span> {</span><br><span>     struct amdmct_memory_info *mem_info;</span><br><span>         mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);</span><br><span>@@ -1145,7 +1145,7 @@</span><br><span>      }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle, unsigned long *current)</span><br><span style="color: hsl(120, 100%, 40%);">+static int amdfam10_get_smbios_data17(int *count, int handle, int parent_handle, unsigned long *current)</span><br><span> {</span><br><span>    struct amdmct_memory_info *mem_info;</span><br><span>         mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);</span><br><span>diff --git a/src/northbridge/amd/amdht/h3finit.h b/src/northbridge/amd/amdht/h3finit.h</span><br><span>index 45ed3c1..743ae97 100644</span><br><span>--- a/src/northbridge/amd/amdht/h3finit.h</span><br><span>+++ b/src/northbridge/amd/amdht/h3finit.h</span><br><span>@@ -168,7 +168,7 @@</span><br><span>        *      @param[in]  u8   node   = The node on which this chain is located</span><br><span>     *      @param[in]  u8   link   = The link on the host for this chain</span><br><span>         *      @param[out] u8   secBus = Secondary Bus number for this non-coherent chain</span><br><span style="color: hsl(0, 100%, 40%);">-       *      @param[out] u8*  subBus = Subordinate Bus number</span><br><span style="color: hsl(120, 100%, 40%);">+       *      @param[out] u8 *subBus = Subordinate Bus number</span><br><span>       *      @param[out] BOOL result = true this routine is supplying the bus numbers</span><br><span>      *                                false use auto Bus numbering</span><br><span>        *</span><br><span>@@ -194,7 +194,7 @@</span><br><span>      * Parameters:</span><br><span>        *      @param[in]  u8  node    = The node on which this chain is located</span><br><span>     *      @param[in]  u8  link    = The link on the host for this chain</span><br><span style="color: hsl(0, 100%, 40%);">-    *      @param[out] u8** list   = supply a pointer to a list</span><br><span style="color: hsl(120, 100%, 40%);">+   *      @param[out] u8 **list   = supply a pointer to a list</span><br><span>          *      @param[out] BOOL result = true to use a manual list</span><br><span>   *                                false to initialize the link automatically</span><br><span>          *</span><br><span>@@ -226,10 +226,10 @@</span><br><span>    *      @param[in]  u8  Dev       = The Device's PCI device Number</span><br><span>        *      @param[in]  u32 DevVenID  = The Device's PCI Vendor + Device ID (offset 0x00)</span><br><span>     *      @param[in]  u8  Link      = The Device's link number (0 or 1)</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in,out] u8*  LinkWidthIn  = modify to change the Link Witdh In</span><br><span style="color: hsl(0, 100%, 40%);">-    *      @param[in,out] u8*  LinkWidthOut  = modify to change the Link Witdh Out</span><br><span style="color: hsl(0, 100%, 40%);">-  *      @param[in,out] u32* FreqCap = modify to change the link's frequency capability</span><br><span style="color: hsl(0, 100%, 40%);">-       *      @param[in,out] u32* FeatureCap = modify to change the link's feature capability</span><br><span style="color: hsl(120, 100%, 40%);">+    *      @param[in,out] u8 *LinkWidthIn  = modify to change the Link Witdh In</span><br><span style="color: hsl(120, 100%, 40%);">+   *      @param[in,out] u8 *LinkWidthOut  = modify to change the Link Witdh Out</span><br><span style="color: hsl(120, 100%, 40%);">+         *      @param[in,out] u32 *FreqCap = modify to change the link's frequency capability</span><br><span style="color: hsl(120, 100%, 40%);">+     *      @param[in,out] u32 *FeatureCap = modify to change the link's feature capability</span><br><span>   *</span><br><span>    * ---------------------------------------------------------------------------------------</span><br><span>    */</span><br><span>@@ -266,9 +266,9 @@</span><br><span>     *      @param[in]  u8  linkA  = The link on this node</span><br><span>        *      @param[in]  u8  nodeB  = The other node on which this link is located</span><br><span>         *      @param[in]  u8  linkB  = The link on that node</span><br><span style="color: hsl(0, 100%, 40%);">-   *      @param[in,out]  u8*  ABLinkWidthLimit = modify to change the Link Witdh In</span><br><span style="color: hsl(0, 100%, 40%);">-       *      @param[in,out]  u8*  BALinkWidthLimit = modify to change the Link Witdh Out</span><br><span style="color: hsl(0, 100%, 40%);">-      *      @param[in,out]  u32* PCBFreqCap  = modify to change the link's frequency capability</span><br><span style="color: hsl(120, 100%, 40%);">+        *      @param[in,out]  u8 *ABLinkWidthLimit = modify to change the Link Witdh In</span><br><span style="color: hsl(120, 100%, 40%);">+      *      @param[in,out]  u8 *BALinkWidthLimit = modify to change the Link Witdh Out</span><br><span style="color: hsl(120, 100%, 40%);">+     *      @param[in,out]  u32 *PCBFreqCap  = modify to change the link's frequency capability</span><br><span>       *</span><br><span>    * ---------------------------------------------------------------------------------------</span><br><span>    */</span><br><span>@@ -299,9 +299,9 @@</span><br><span>     *      @param[in]  u8  hostNode  = The node on which this link is located</span><br><span>    *      @param[in]  u8  hostLink  = The link about to be initialized</span><br><span>          *      @param[in]  u8  Depth  = The depth in the I/O chain from the Host</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in,out]  u8* DownstreamLinkWidthLimit = modify to change the Link Witdh In</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in,out]  u8* UpstreamLinkWidthLimit  = modify to change the Link Witdh Out</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in,out]  u32* PCBFreqCap = modify to change the link's frequency capability</span><br><span style="color: hsl(120, 100%, 40%);">+         *      @param[in,out]  u8 *DownstreamLinkWidthLimit = modify to change the Link Witdh In</span><br><span style="color: hsl(120, 100%, 40%);">+      *      @param[in,out]  u8 *UpstreamLinkWidthLimit  = modify to change the Link Witdh Out</span><br><span style="color: hsl(120, 100%, 40%);">+      *      @param[in,out]  u32 *PCBFreqCap = modify to change the link's frequency capability</span><br><span>        *</span><br><span>    * ---------------------------------------------------------------------------------------</span><br><span>    */</span><br><span>@@ -400,9 +400,9 @@</span><br><span>     *      @param[in]  u8   hostLink  = The link about to be initialized</span><br><span>         *      @param[in]  u8   Depth     = The depth in the I/O chain from the Host</span><br><span>         *      @param[in]  u8   Link      = the link on the device (0 or 1)</span><br><span style="color: hsl(0, 100%, 40%);">-     *      @param[in,out]  u8*   LinkWidthIn    = modify to change the Link Witdh In</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in,out]  u8*   LinkWidthOut   = modify to change the Link Witdh Out</span><br><span style="color: hsl(0, 100%, 40%);">-       *      @param[in,out]  u16*   LinkFrequency = modify to change the link's frequency capability</span><br><span style="color: hsl(120, 100%, 40%);">+    *      @param[in,out]  u8 *LinkWidthIn    = modify to change the Link Witdh In</span><br><span style="color: hsl(120, 100%, 40%);">+        *      @param[in,out]  u8 *LinkWidthOut   = modify to change the Link Witdh Out</span><br><span style="color: hsl(120, 100%, 40%);">+       *      @param[in,out]  u16 *LinkFrequency = modify to change the link's frequency capability</span><br><span>     *</span><br><span>    * ---------------------------------------------------------------------------------------</span><br><span>    */</span><br><span>@@ -431,9 +431,9 @@</span><br><span>     * Parameters:</span><br><span>        *      @param[in]  u8  node  = One node on which this link is located</span><br><span>        *      @param[in]  u8  link  = The link on this node</span><br><span style="color: hsl(0, 100%, 40%);">-    *      @param[in,out]  u8*  LinkWidthIn = modify to change the Link Witdh In</span><br><span style="color: hsl(0, 100%, 40%);">-    *      @param[in,out]  u8*  LinkWidthOut = modify to change the Link Witdh Out</span><br><span style="color: hsl(0, 100%, 40%);">-  *      @param[in,out]  u16*  LinkFrequency  = modify to change the link's frequency capability</span><br><span style="color: hsl(120, 100%, 40%);">+    *      @param[in,out]  u8 *LinkWidthIn = modify to change the Link Witdh In</span><br><span style="color: hsl(120, 100%, 40%);">+   *      @param[in,out]  u8 *LinkWidthOut = modify to change the Link Witdh Out</span><br><span style="color: hsl(120, 100%, 40%);">+         *      @param[in,out]  u16 *LinkFrequency  = modify to change the link's frequency capability</span><br><span>    *</span><br><span>    *---------------------------------------------------------------------------------------</span><br><span>     */</span><br><span>@@ -459,7 +459,7 @@</span><br><span>     * Parameters:</span><br><span>        *      @param[in]  u8  evtClass = What level event is this</span><br><span>   *      @param[in]  u16 event = A unique ID of this event</span><br><span style="color: hsl(0, 100%, 40%);">-        *      @param[in]  u8* pEventData0 = useful data associated with the event.</span><br><span style="color: hsl(120, 100%, 40%);">+   *      @param[in]  u8 *pEventData0 = useful data associated with the event.</span><br><span>          *</span><br><span>    * ---------------------------------------------------------------------------------------</span><br><span>    */</span><br><span>diff --git a/src/northbridge/amd/pi/agesawrapper_call.h b/src/northbridge/amd/pi/agesawrapper_call.h</span><br><span>index 15b9098..1ed4a4c 100644</span><br><span>--- a/src/northbridge/amd/pi/agesawrapper_call.h</span><br><span>+++ b/src/northbridge/amd/pi/agesawrapper_call.h</span><br><span>@@ -32,7 +32,7 @@</span><br><span>  */</span><br><span> static const char * decodeAGESA_STATUS(AGESA_STATUS sret)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",</span><br><span style="color: hsl(120, 100%, 40%);">+     const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",</span><br><span>                                    "AGESA_BOUNDS_CHK", "AGESA_ALERT",</span><br><span>                                       "AGESA_WARNING", "AGESA_ERROR",</span><br><span>                                  "AGESA_CRITICAL", "AGESA_FATAL"</span><br><span>diff --git a/src/northbridge/intel/fsp_sandybridge/raminit.c b/src/northbridge/intel/fsp_sandybridge/raminit.c</span><br><span>index 7cc61ae..f67d405 100644</span><br><span>--- a/src/northbridge/intel/fsp_sandybridge/raminit.c</span><br><span>+++ b/src/northbridge/intel/fsp_sandybridge/raminit.c</span><br><span>@@ -21,7 +21,7 @@</span><br><span> #include "raminit.h"</span><br><span> #include "northbridge.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const char* ecc_decoder[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *ecc_decoder[] = {</span><br><span>       "inactive",</span><br><span>        "active on IO",</span><br><span>    "disabled on IO",</span><br><span>diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c</span><br><span>index e5e2b93..55a7339 100644</span><br><span>--- a/src/northbridge/intel/haswell/raminit.c</span><br><span>+++ b/src/northbridge/intel/haswell/raminit.c</span><br><span>@@ -62,7 +62,7 @@</span><br><span>            __func__, pei_data->mrc_input, pei_data->mrc_input_len);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const char* ecc_decoder[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *ecc_decoder[] = {</span><br><span>     "inactive",</span><br><span>        "active on IO",</span><br><span>    "disabled on IO",</span><br><span>diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c</span><br><span>index 61f761e..691452c 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/raminit_mrc.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c</span><br><span>@@ -130,7 +130,7 @@</span><br><span>          __func__, pei_data->mrc_input, pei_data->mrc_input_len);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const char* ecc_decoder[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *ecc_decoder[] = {</span><br><span>     "inactive",</span><br><span>        "active on IO",</span><br><span>    "disabled on IO",</span><br><span>diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h</span><br><span>index 0e0395a..580c4eb 100644</span><br><span>--- a/src/soc/intel/baytrail/include/soc/gpio.h</span><br><span>+++ b/src/soc/intel/baytrail/include/soc/gpio.h</span><br><span>@@ -366,7 +366,7 @@</span><br><span> /* Description of GPIO 'bank' ex. {ncore, score. ssus} */</span><br><span> struct gpio_bank {</span><br><span>        const int gpio_count;</span><br><span style="color: hsl(0, 100%, 40%);">-   const u8* gpio_to_pad;</span><br><span style="color: hsl(120, 100%, 40%);">+        const u8 *gpio_to_pad;</span><br><span>       const int legacy_base;</span><br><span>       const unsigned long pad_base;</span><br><span>        const u8 has_wake_en :1;</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/include/soc/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h</span><br><span>index 02c226b..7c81151 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/include/soc/gpio.h</span><br><span>+++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h</span><br><span>@@ -342,7 +342,7 @@</span><br><span> /* Description of GPIO 'bank' ex. {ncore, score. ssus} */</span><br><span> struct gpio_bank {</span><br><span>   const int gpio_count;</span><br><span style="color: hsl(0, 100%, 40%);">-   const u8* gpio_to_pad;</span><br><span style="color: hsl(120, 100%, 40%);">+        const u8 *gpio_to_pad;</span><br><span>       const int legacy_base;</span><br><span>       const unsigned long pad_base;</span><br><span>        const u8 has_wake_en :1;</span><br><span>diff --git a/src/soc/nvidia/tegra210/clock.c b/src/soc/nvidia/tegra210/clock.c</span><br><span>index ba1efdc..86fbf6c 100644</span><br><span>--- a/src/soc/nvidia/tegra210/clock.c</span><br><span>+++ b/src/soc/nvidia/tegra210/clock.c</span><br><span>@@ -644,7 +644,7 @@</span><br><span>      graphics_pll();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg,</span><br><span style="color: hsl(120, 100%, 40%);">+void clock_grp_enable_clear_reset(u32 val, u32 *clk_enb_set_reg,</span><br><span>                             u32 *rst_dev_clr_reg)</span><br><span> {</span><br><span>         write32(clk_enb_set_reg, val);</span><br><span>diff --git a/src/soc/nvidia/tegra210/include/soc/clock.h b/src/soc/nvidia/tegra210/include/soc/clock.h</span><br><span>index 46e1e96..1ae6ce1 100644</span><br><span>--- a/src/soc/nvidia/tegra210/include/soc/clock.h</span><br><span>+++ b/src/soc/nvidia/tegra210/include/soc/clock.h</span><br><span>@@ -431,7 +431,7 @@</span><br><span> void clock_set_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);</span><br><span> void clock_clr_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);</span><br><span> void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x, u32 y);</span><br><span style="color: hsl(0, 100%, 40%);">-void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg, u32* rst_dev_clr_reg);</span><br><span style="color: hsl(120, 100%, 40%);">+void clock_grp_enable_clear_reset(u32 val, u32 *clk_enb_set_reg, u32 *rst_dev_clr_reg);</span><br><span> void clock_reset_l(u32 l);</span><br><span> void clock_reset_h(u32 h);</span><br><span> void clock_reset_u(u32 u);</span><br><span>diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c</span><br><span>index 436854e..6211dde 100644</span><br><span>--- a/src/southbridge/amd/sb700/sm.c</span><br><span>+++ b/src/southbridge/amd/sb700/sm.c</span><br><span>@@ -48,7 +48,7 @@</span><br><span> #define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL POWER_MODE_ON</span><br><span> #endif</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const char* power_mode_names[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *power_mode_names[] = {</span><br><span>      [POWER_MODE_OFF] = "off",</span><br><span>  [POWER_MODE_ON] = "on",</span><br><span>    [POWER_MODE_LAST] = "last",</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c</span><br><span>index 54a16ce..0334af3 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/me_8.x.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/me_8.x.c</span><br><span>@@ -830,7 +830,7 @@</span><br><span>     memset(mbp_data, 0, sizeof(*mbp_data));</span><br><span> </span><br><span>  while (mbp_hdr.num_entries--) {</span><br><span style="color: hsl(0, 100%, 40%);">-         u32* copy_addr;</span><br><span style="color: hsl(120, 100%, 40%);">+               u32 *copy_addr;</span><br><span>              u32 copy_size, buffer_room;</span><br><span>          void *p;</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c</span><br><span>index 03a9d45..fb68d6d 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c</span><br><span>@@ -827,7 +827,7 @@</span><br><span>      memset(mbp_data, 0, sizeof(*mbp_data));</span><br><span> </span><br><span>  while (mbp_hdr.num_entries--) {</span><br><span style="color: hsl(0, 100%, 40%);">-         u32* copy_addr;</span><br><span style="color: hsl(120, 100%, 40%);">+               u32 *copy_addr;</span><br><span>              u32 copy_size, buffer_room;</span><br><span>          void *p;</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/me_8.x.c b/src/southbridge/intel/fsp_i89xx/me_8.x.c</span><br><span>index b77cad2..e3e55e2 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/me_8.x.c</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/me_8.x.c</span><br><span>@@ -782,7 +782,7 @@</span><br><span>      memset(mbp_data, 0, sizeof(*mbp_data));</span><br><span> </span><br><span>  while (mbp_hdr.num_entries--) {</span><br><span style="color: hsl(0, 100%, 40%);">-         u32* copy_addr;</span><br><span style="color: hsl(120, 100%, 40%);">+               u32 *copy_addr;</span><br><span>              u32 copy_size, buffer_room;</span><br><span>          void *p;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26461">change 26461</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26461"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib2bb6cc80ac2bdc389c60c7ffac4bba937f0fca8 </div>
<div style="display:none"> Gerrit-Change-Number: 26461 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>