<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26425">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/via/vx800: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: Ib432d3c3ce2788b0138a1b0e852385ab4f9b65ee<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/northbridge/via/vx800/lpc.c<br>M src/northbridge/via/vx800/northbridge.c<br>M src/northbridge/via/vx800/vga.c<br>3 files changed, 10 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/26425/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c</span><br><span>index 1ab11c0..93413a2 100644</span><br><span>--- a/src/northbridge/via/vx800/lpc.c</span><br><span>+++ b/src/northbridge/via/vx800/lpc.c</span><br><span>@@ -94,7 +94,7 @@</span><br><span> printk(BIOS_SPEW, "%s: DONE\n", __FUNCTION__);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void setup_pm(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void setup_pm(struct device *dev)</span><br><span> {</span><br><span> u16 tmp;</span><br><span> /* Debounce LID and PWRBTN# Inputs for 16ms. */</span><br><span>@@ -274,7 +274,7 @@</span><br><span> </span><br><span> /* total kludge to get lxb to call our childrens set/enable functions - these are</span><br><span> not called unless this device has a resource to set - so set a dummy one */</span><br><span style="color: hsl(0, 100%, 40%);">-static void vx800_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void vx800_read_resources(struct device *dev)</span><br><span> {</span><br><span> </span><br><span> struct resource *resource;</span><br><span>@@ -287,7 +287,7 @@</span><br><span> resource->base = 0x2e;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void vx800_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void vx800_set_resources(struct device *dev)</span><br><span> {</span><br><span> struct resource *resource;</span><br><span> resource = find_resource(dev, 1);</span><br><span>diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c</span><br><span>index 609abf8..2f1ddc1 100644</span><br><span>--- a/src/northbridge/via/vx800/northbridge.c</span><br><span>+++ b/src/northbridge/via/vx800/northbridge.c</span><br><span>@@ -33,7 +33,7 @@</span><br><span> /* !!FIXME!! I declared this to fix the build. */</span><br><span> u8 acpi_sleep_type = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void memctrl_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void memctrl_init(struct device *dev)</span><br><span> {</span><br><span> /*</span><br><span> set VGA in uma_ram_setting.c, not in this function.</span><br><span>@@ -51,13 +51,13 @@</span><br><span> .device = PCI_DEVICE_ID_VIA_VX855_MEMCTRL,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span> /*</span><br><span> * the order is important to find the correct RAM size.</span><br><span> */</span><br><span> u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };</span><br><span style="color: hsl(0, 100%, 40%);">- device_t mc_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *mc_dev;</span><br><span> u32 pci_tolm;</span><br><span> u8 reg;</span><br><span> </span><br><span>@@ -124,7 +124,7 @@</span><br><span> .scan_bus = pci_domain_scan_bus,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void cpu_bus_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void cpu_bus_init(struct device *dev)</span><br><span> {</span><br><span> initialize_cpus(dev->link_list);</span><br><span> }</span><br><span>diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c</span><br><span>index 4109f62..447c762 100644</span><br><span>--- a/src/northbridge/via/vx800/vga.c</span><br><span>+++ b/src/northbridge/via/vx800/vga.c</span><br><span>@@ -72,7 +72,7 @@</span><br><span> * N: Frame Buffer Size 2^N MB</span><br><span> */</span><br><span> u8 i;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> dev = dev_find_slot(0, PCI_DEVFN(0, 3));</span><br><span> i = pci_read_config8(dev, 0xa1);</span><br><span> i = (i & 0x70);</span><br><span>@@ -124,7 +124,7 @@</span><br><span> #ifdef UNUSED_CODE</span><br><span> static void write_protect_vgabios(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> </span><br><span> printk(BIOS_INFO, "write_protect_vgabios\n");</span><br><span> /* there are two possible devices. Just do both. */</span><br><span>@@ -149,7 +149,7 @@</span><br><span> }</span><br><span> </span><br><span> extern u8 acpi_sleep_type;</span><br><span style="color: hsl(0, 100%, 40%);">-static void vga_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void vga_init(struct device *dev)</span><br><span> {</span><br><span> uint8_t reg8;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26425">change 26425</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26425"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib432d3c3ce2788b0138a1b0e852385ab4f9b65ee </div>
<div style="display:none"> Gerrit-Change-Number: 26425 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>