<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26414">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/amd/cimx/sb800: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I2335b7e193663bb6c82bf267aaeb0b2367986f62<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/amd/cimx/sb800/fan.c<br>M src/southbridge/amd/cimx/sb800/fan.h<br>M src/southbridge/amd/cimx/sb800/late.c<br>M src/southbridge/amd/cimx/sb800/lpc.c<br>M src/southbridge/amd/cimx/sb800/lpc.h<br>M src/southbridge/amd/cimx/sb800/spi.c<br>6 files changed, 16 insertions(+), 16 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/26414/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c</span><br><span>index 5925330..e7749e4 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/fan.c</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/fan.c</span><br><span>@@ -14,14 +14,14 @@</span><br><span> */</span><br><span> </span><br><span> #include <southbridge/amd/cimx/cimx_util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/device.h> /* device_t */</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h> /* struct device **/</span><br><span> #include <device/pci.h> /* device_operations */</span><br><span> #include "SBPLATFORM.h"</span><br><span> #include "sb_cimx.h"</span><br><span> #include "chip.h" /* struct southbridge_amd_cimx_sb800_config */</span><br><span> #include "fan.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void init_sb800_MANUAL_fans(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void init_sb800_MANUAL_fans(struct device *dev)</span><br><span> {</span><br><span> int i;</span><br><span> struct southbridge_amd_cimx_sb800_config *sb_chip =</span><br><span>@@ -54,7 +54,7 @@</span><br><span> </span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void init_sb800_IMC_fans(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void init_sb800_IMC_fans(struct device *dev)</span><br><span> {</span><br><span> </span><br><span> AMDSBCFG sb_config;</span><br><span>diff --git a/src/southbridge/amd/cimx/sb800/fan.h b/src/southbridge/amd/cimx/sb800/fan.h</span><br><span>index 6542967..f31e486 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/fan.h</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/fan.h</span><br><span>@@ -17,8 +17,8 @@</span><br><span> #define _SB800_FAN_H_</span><br><span> </span><br><span> #ifndef __PRE_RAM__</span><br><span style="color: hsl(0, 100%, 40%);">-void init_sb800_IMC_fans(device_t dev);</span><br><span style="color: hsl(0, 100%, 40%);">-void init_sb800_MANUAL_fans(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void init_sb800_IMC_fans(struct device *dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void init_sb800_MANUAL_fans(struct device *dev);</span><br><span> #endif</span><br><span> </span><br><span> /* Fan Register Definitions */</span><br><span>diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c</span><br><span>index 393eda0..4239d46 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/late.c</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/late.c</span><br><span>@@ -15,7 +15,7 @@</span><br><span> */</span><br><span> </span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/device.h> /* device_t */</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h> /* struct device **/</span><br><span> #include <device/pci.h> /* device_operations */</span><br><span> #include <device/pci_ids.h></span><br><span> #include <bootstate.h></span><br><span>@@ -118,7 +118,7 @@</span><br><span> .set_subsystem = pci_dev_set_subsystem,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_init(struct device *dev)</span><br><span> {</span><br><span> printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n");</span><br><span> </span><br><span>@@ -344,7 +344,7 @@</span><br><span> /**</span><br><span> * @brief SB Cimx entry point sbBeforePciInit wrapper</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-static void sb800_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sb800_enable(struct device *dev)</span><br><span> {</span><br><span> struct southbridge_amd_cimx_sb800_config *sb_chip =</span><br><span> (struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);</span><br><span>@@ -427,7 +427,7 @@</span><br><span> </span><br><span> case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t device;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *device;</span><br><span> for (device = dev; device; device = device->sibling) {</span><br><span> if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15,0)) break;</span><br><span> sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled;</span><br><span>diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c</span><br><span>index 4973558..40c0739 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/lpc.c</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/lpc.c</span><br><span>@@ -22,7 +22,7 @@</span><br><span> #include <arch/io.h></span><br><span> #include <cbmem.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span> struct resource *res;</span><br><span> </span><br><span>@@ -76,7 +76,7 @@</span><br><span> * @param dev the device whose children's resources are to be enabled</span><br><span> *</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-void lpc_enable_childrens_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void lpc_enable_childrens_resources(struct device *dev)</span><br><span> {</span><br><span> struct bus *link;</span><br><span> u32 reg, reg_x;</span><br><span>@@ -88,7 +88,7 @@</span><br><span> reg_x = pci_read_config32(dev, 0x48);</span><br><span> </span><br><span> for (link = dev->link_list; link; link = link->next) {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t child;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *child;</span><br><span> for (child = link->children; child;</span><br><span> child = child->sibling) {</span><br><span> if (child->enabled</span><br><span>diff --git a/src/southbridge/amd/cimx/sb800/lpc.h b/src/southbridge/amd/cimx/sb800/lpc.h</span><br><span>index ee76b43..b478eb4 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/lpc.h</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/lpc.h</span><br><span>@@ -21,8 +21,8 @@</span><br><span> #define SPI_ROM_ENABLE 0x02</span><br><span> #define SPI_BASE_ADDRESS 0xFEC10000</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void lpc_read_resources(device_t dev);</span><br><span style="color: hsl(0, 100%, 40%);">-void lpc_set_resources(device_t dev);</span><br><span style="color: hsl(0, 100%, 40%);">-void lpc_enable_childrens_resources(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void lpc_read_resources(struct device *dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void lpc_set_resources(struct device *dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void lpc_enable_childrens_resources(struct device *dev);</span><br><span> </span><br><span> #endif</span><br><span>diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c</span><br><span>index 2c541e3..54dd77a 100644</span><br><span>--- a/src/southbridge/amd/cimx/sb800/spi.c</span><br><span>+++ b/src/southbridge/amd/cimx/sb800/spi.c</span><br><span>@@ -48,7 +48,7 @@</span><br><span> </span><br><span> void spi_init()</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> </span><br><span> dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));</span><br><span> spibar = pci_read_config32(dev, 0xA0) & ~0x1F;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26414">change 26414</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26414"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2335b7e193663bb6c82bf267aaeb0b2367986f62 </div>
<div style="display:none"> Gerrit-Change-Number: 26414 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>