<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26408">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/amd/agesa/hudson: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I85aafdc204731734ba4f02551ba5ccdd6535df77<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/amd/agesa/hudson/hudson.c<br>M src/southbridge/amd/agesa/hudson/hudson.h<br>M src/southbridge/amd/agesa/hudson/lpc.c<br>M src/southbridge/amd/agesa/hudson/sm.c<br>M src/southbridge/amd/agesa/hudson/spi.c<br>5 files changed, 17 insertions(+), 17 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/26408/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c</span><br><span>index 9a6df61..1e6f676 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/hudson.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/hudson.c</span><br><span>@@ -77,14 +77,14 @@</span><br><span> pm_write8(PM_REG_USB_ENABLE, reg8);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void hudson_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void hudson_enable(struct device *dev)</span><br><span> {</span><br><span> printk(BIOS_DEBUG, "hudson_enable()\n");</span><br><span> switch (dev->path.pci.devfn) {</span><br><span> case PCI_DEVFN(0x14, 5):</span><br><span> if (dev->enabled == 0) {</span><br><span> // read the VENDEV ID</span><br><span style="color: hsl(0, 100%, 40%);">- device_t usb_dev = dev_find_slot( 0, PCI_DEVFN( 0x14, 5));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *usb_dev = dev_find_slot( 0, PCI_DEVFN( 0x14, 5));</span><br><span> u32 usb_device_id = pci_read_config32(usb_dev, 0) >> 16;</span><br><span> u8 reg8;</span><br><span> if (usb_device_id == PCI_DEVICE_ID_AMD_SB900_USB_20_5) {</span><br><span>@@ -99,7 +99,7 @@</span><br><span> case PCI_DEVFN(0x14, 7):</span><br><span> if (dev->enabled == 0) {</span><br><span> // read the VENDEV ID</span><br><span style="color: hsl(0, 100%, 40%);">- device_t sd_dev = dev_find_slot( 0, PCI_DEVFN( 0x14, 7));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *sd_dev = dev_find_slot( 0, PCI_DEVFN( 0x14, 7));</span><br><span> u32 sd_device_id = pci_read_config32( sd_dev, 0) >> 16;</span><br><span> /* turn off the SDHC controller in the PM reg */</span><br><span> u8 reg8;</span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h</span><br><span>index c89f682..165d33f 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/hudson.h</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/hudson.h</span><br><span>@@ -79,7 +79,7 @@</span><br><span> int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);</span><br><span> </span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">-void hudson_enable(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void hudson_enable(struct device *dev);</span><br><span> </span><br><span> #endif /* __PRE_RAM__ */</span><br><span> #endif /* __SMM__ */</span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>index 7ada832..132a333 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>@@ -31,11 +31,11 @@</span><br><span> #include "hudson.h"</span><br><span> #include "pci_devs.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_init(struct device *dev)</span><br><span> {</span><br><span> u8 byte;</span><br><span> u32 dword;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t sm_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *sm_dev;</span><br><span> </span><br><span> /* Enable the LPC Controller */</span><br><span> sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));</span><br><span>@@ -86,7 +86,7 @@</span><br><span> setup_i8254 ();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void hudson_lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void hudson_lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span> struct resource *res;</span><br><span> </span><br><span>@@ -134,7 +134,7 @@</span><br><span> * @param dev the device whose children's resources are to be enabled</span><br><span> *</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-static void hudson_lpc_enable_childrens_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void hudson_lpc_enable_childrens_resources(struct device *dev)</span><br><span> {</span><br><span> struct bus *link;</span><br><span> u32 reg, reg_x;</span><br><span>@@ -174,7 +174,7 @@</span><br><span> reg_var[0] = pci_read_config16(dev, 0x64);</span><br><span> </span><br><span> for (link = dev->link_list; link; link = link->next) {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t child;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *child;</span><br><span> for (child = link->children; child;</span><br><span> child = child->sibling) {</span><br><span> if (child->enabled</span><br><span>@@ -313,7 +313,7 @@</span><br><span> pci_write_config8(dev, 0x74, wiosize);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void hudson_lpc_enable_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void hudson_lpc_enable_resources(struct device *dev)</span><br><span> {</span><br><span> pci_dev_enable_resources(dev);</span><br><span> hudson_lpc_enable_childrens_resources(dev);</span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>index 74367a7..1b6f5ae 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>@@ -76,12 +76,12 @@</span><br><span> * HUDSON enables SATA by default in SMBUS Control.</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void sm_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void sm_init(struct device *dev)</span><br><span> {</span><br><span> setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_recv_byte(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_recv_byte(struct device *dev)</span><br><span> {</span><br><span> u32 device;</span><br><span> struct resource *res;</span><br><span>@@ -95,7 +95,7 @@</span><br><span> return do_smbus_recv_byte(res->base, device);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_send_byte(device_t dev, u8 val)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_send_byte(struct device *dev, u8 val)</span><br><span> {</span><br><span> u32 device;</span><br><span> struct resource *res;</span><br><span>@@ -109,7 +109,7 @@</span><br><span> return do_smbus_send_byte(res->base, device, val);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_read_byte(device_t dev, u8 address)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_read_byte(struct device *dev, u8 address)</span><br><span> {</span><br><span> u32 device;</span><br><span> struct resource *res;</span><br><span>@@ -123,7 +123,7 @@</span><br><span> return do_smbus_read_byte(res->base, device, address);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_write_byte(device_t dev, u8 address, u8 val)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)</span><br><span> {</span><br><span> u32 device;</span><br><span> struct resource *res;</span><br><span>@@ -143,7 +143,7 @@</span><br><span> .write_byte = lsmbus_write_byte,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void hudson_sm_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void hudson_sm_read_resources(struct device *dev)</span><br><span> {</span><br><span> }</span><br><span> </span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c</span><br><span>index 22951ab..de6792f 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/spi.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/spi.c</span><br><span>@@ -79,7 +79,7 @@</span><br><span> </span><br><span> void spi_init(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> </span><br><span> dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));</span><br><span> spibar = pci_read_config32(dev, 0xA0) & ~0x1F;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26408">change 26408</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I85aafdc204731734ba4f02551ba5ccdd6535df77 </div>
<div style="display:none"> Gerrit-Change-Number: 26408 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>