<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26400">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nvidia/mcp55: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I48ab6d77be0201ac7b49b26e0366b6e3a1e5ac52<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/nvidia/mcp55/azalia.c<br>M src/southbridge/nvidia/mcp55/fadt.c<br>M src/southbridge/nvidia/mcp55/lpc.c<br>M src/southbridge/nvidia/mcp55/mcp55.c<br>M src/southbridge/nvidia/mcp55/mcp55.h<br>M src/southbridge/nvidia/mcp55/pci.c<br>M src/southbridge/nvidia/mcp55/smbus.c<br>7 files changed, 23 insertions(+), 23 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/26400/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/nvidia/mcp55/azalia.c b/src/southbridge/nvidia/mcp55/azalia.c</span><br><span>index 2cb731c..c4b67cb 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/azalia.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/azalia.c</span><br><span>@@ -254,7 +254,7 @@</span><br><span> #endif</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void azalia_set_subsystem(struct device *dev, unsigned vendor, unsigned device)</span><br><span> {</span><br><span>   if (!vendor || !device) {</span><br><span>            pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c</span><br><span>index cade43d..8064b12 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/fadt.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/fadt.c</span><br><span>@@ -29,7 +29,7 @@</span><br><span> void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)</span><br><span> {</span><br><span>        acpi_header_t *header = &(fadt->header);</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span>  int is_mcp55 = 0;</span><br><span>    dev = dev_find_device(PCI_VENDOR_ID_NVIDIA,</span><br><span>          PCI_DEVICE_ID_NVIDIA_MCP55_LPC, 0);</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>index ba9386b..b6bb1f8 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>@@ -53,7 +53,7 @@</span><br><span> #define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span> #endif</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_common_init(device_t dev, int master)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_common_init(struct device *dev, int master)</span><br><span> {</span><br><span>   u8 byte;</span><br><span>     void *ioapic_base;</span><br><span>@@ -70,7 +70,7 @@</span><br><span>               clear_ioapic(ioapic_base);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_slave_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_slave_init(struct device *dev)</span><br><span> {</span><br><span>     lpc_common_init(dev, 0);</span><br><span> }</span><br><span>@@ -84,7 +84,7 @@</span><br><span>    printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void lpc_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void lpc_init(struct device *dev)</span><br><span> {</span><br><span>      u8 byte, byte_old;</span><br><span>   int on, nmi_option;</span><br><span>@@ -145,7 +145,7 @@</span><br><span>    enable_hpet(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span>  struct resource *res;</span><br><span> </span><br><span>@@ -177,7 +177,7 @@</span><br><span>  *</span><br><span>  * @param dev The device whose children's resources are to be enabled.</span><br><span>  */</span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_lpc_enable_childrens_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_lpc_enable_childrens_resources(struct device *dev)</span><br><span> {</span><br><span>  u32 reg, reg_var[4];</span><br><span>         int i, var_num = 0;</span><br><span>@@ -186,7 +186,7 @@</span><br><span>    reg = pci_read_config32(dev, 0xa0);</span><br><span> </span><br><span>      for (link = dev->link_list; link; link = link->next) {</span><br><span style="color: hsl(0, 100%, 40%);">-            device_t child;</span><br><span style="color: hsl(120, 100%, 40%);">+               struct device *child;</span><br><span>                for (child = link->children; child; child = child->sibling) {</span><br><span>                  if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {</span><br><span>                                 struct resource *res;</span><br><span>@@ -234,14 +234,14 @@</span><br><span>                pci_write_config32(dev, 0xa8 + i * 4, reg_var[i]);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_lpc_enable_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_lpc_enable_resources(struct device *dev)</span><br><span> {</span><br><span>     pci_dev_enable_resources(dev);</span><br><span>       mcp55_lpc_enable_childrens_resources(dev);</span><br><span> }</span><br><span> </span><br><span> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)</span><br><span style="color: hsl(0, 100%, 40%);">-static void southbridge_acpi_fill_ssdt_generator(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void southbridge_acpi_fill_ssdt_generator(struct device *device)</span><br><span> {</span><br><span>        amd_generate_powernow(0, 0, 0);</span><br><span> }</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/mcp55.c b/src/southbridge/nvidia/mcp55/mcp55.c</span><br><span>index 7c43fea..4fe2a4e 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/mcp55.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/mcp55.c</span><br><span>@@ -27,9 +27,9 @@</span><br><span> </span><br><span> static u32 final_reg;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static device_t find_lpc_dev(device_t dev, unsigned devfn)</span><br><span style="color: hsl(120, 100%, 40%);">+static struct device *find_lpc_dev(struct device *dev, unsigned devfn)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   device_t lpc_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+     struct device *lpc_dev;</span><br><span> </span><br><span>  lpc_dev = dev_find_slot(dev->bus->secondary, devfn);</span><br><span> </span><br><span>@@ -54,9 +54,9 @@</span><br><span>   return lpc_dev;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void mcp55_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void mcp55_enable(struct device *dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-     device_t lpc_dev = 0, sm_dev = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     struct device *lpc_dev = 0, sm_dev = 0;</span><br><span>      unsigned index = 0, index2 = 0;</span><br><span>      u32 reg_old, reg;</span><br><span>    u8 byte;</span><br><span>@@ -221,7 +221,7 @@</span><br><span>       }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_set_subsystem(device_t dev, unsigned vendor, unsigned device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_set_subsystem(struct device *dev, unsigned vendor, unsigned device)</span><br><span> {</span><br><span>        pci_write_config32(dev, 0x40,</span><br><span>                           ((device & 0xffff) << 16) | (vendor & 0xffff));</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h</span><br><span>index a244b82..8d595c9 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/mcp55.h</span><br><span>+++ b/src/southbridge/nvidia/mcp55/mcp55.h</span><br><span>@@ -26,7 +26,7 @@</span><br><span> </span><br><span> #ifndef __PRE_RAM__</span><br><span> #include "chip.h"</span><br><span style="color: hsl(0, 100%, 40%);">-void mcp55_enable(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void mcp55_enable(struct device *dev);</span><br><span> extern struct pci_operations mcp55_pci_ops;</span><br><span> #else</span><br><span> void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/pci.c b/src/southbridge/nvidia/mcp55/pci.c</span><br><span>index 978fea4..bd92c7e 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/pci.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/pci.c</span><br><span>@@ -29,7 +29,7 @@</span><br><span> {</span><br><span>   u32 dword;</span><br><span>   u16 word;</span><br><span style="color: hsl(0, 100%, 40%);">-       device_t pci_domain_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+      struct device *pci_domain_dev;</span><br><span>       struct resource *mem, *pref;</span><br><span> </span><br><span>     /* System error enable */</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c</span><br><span>index c41445b..244759d 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/smbus.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/smbus.c</span><br><span>@@ -27,7 +27,7 @@</span><br><span> #include "mcp55.h"</span><br><span> #include "smbus.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_recv_byte(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_recv_byte(struct device *dev)</span><br><span> {</span><br><span>        unsigned device;</span><br><span>     struct resource *res;</span><br><span>@@ -41,7 +41,7 @@</span><br><span>    return do_smbus_recv_byte(res->base, device);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_send_byte(device_t dev, u8 val)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_send_byte(struct device *dev, u8 val)</span><br><span> {</span><br><span>     unsigned device;</span><br><span>     struct resource *res;</span><br><span>@@ -55,7 +55,7 @@</span><br><span>    return do_smbus_send_byte(res->base, device, val);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_read_byte(device_t dev, u8 address)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_read_byte(struct device *dev, u8 address)</span><br><span> {</span><br><span>        unsigned device;</span><br><span>     struct resource *res;</span><br><span>@@ -69,7 +69,7 @@</span><br><span>    return do_smbus_read_byte(res->base, device, address);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_write_byte(device_t dev, u8 address, u8 val)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)</span><br><span> {</span><br><span>  unsigned device;</span><br><span>     struct resource *res;</span><br><span>@@ -93,7 +93,7 @@</span><br><span> unsigned pm_base;</span><br><span> #endif</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_sm_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_sm_read_resources(struct device *dev)</span><br><span> {</span><br><span>  unsigned long index;</span><br><span> </span><br><span>@@ -106,7 +106,7 @@</span><br><span>       compact_resources(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mcp55_sm_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mcp55_sm_init(struct device *dev)</span><br><span> {</span><br><span> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)</span><br><span>       struct resource *res;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26400">change 26400</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26400"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I48ab6d77be0201ac7b49b26e0366b6e3a1e5ac52 </div>
<div style="display:none"> Gerrit-Change-Number: 26400 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>