<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26355">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/device/oprom/x86emu/fpu.c: Fix coding style<br><br>Change-Id: Ia96926570f638820f1414e23983bce9ee61d5b24<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/device/oprom/x86emu/fpu.c<br>1 file changed, 769 insertions(+), 765 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/26355/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/device/oprom/x86emu/fpu.c b/src/device/oprom/x86emu/fpu.c</span><br><span>index 7edebd4..3443d52 100644</span><br><span>--- a/src/device/oprom/x86emu/fpu.c</span><br><span>+++ b/src/device/oprom/x86emu/fpu.c</span><br><span>@@ -44,10 +44,10 @@</span><br><span> /* opcode=0xd8 */</span><br><span> void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("ESC D8\n");</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("ESC D8\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span>@@ -59,40 +59,40 @@</span><br><span> #ifdef DEBUG</span><br><span> </span><br><span> static const char *x86emu_fpu_op_d9_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",</span><br><span> };</span><br><span> </span><br><span> static const char *x86emu_fpu_op_d9_tab1[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\t", "FLD\t", "FLD\t", "FLD\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\t", "FLD\t", "FLD\t", "FLD\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\t", "FLD\t", "FLD\t", "FLD\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\t", "FLD\t", "FLD\t", "FLD\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FNOP", "ESC_D9", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FNOP", "ESC_D9", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FCHS", "FABS", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(0, 100%, 40%);">- "FTST", "FXAM", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FCHS", "FABS", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FTST", "FXAM", "ESC_D9", "ESC_D9",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FLD1", "FLDL2T", "FLDL2E", "FLDPI",</span><br><span style="color: hsl(0, 100%, 40%);">- "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD1", "FLDL2T", "FLDL2E", "FLDPI",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "F2XM1", "FYL2X", "FPTAN", "FPATAN",</span><br><span style="color: hsl(0, 100%, 40%);">- "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",</span><br><span style="color: hsl(120, 100%, 40%);">+ "F2XM1", "FYL2X", "FPTAN", "FPATAN",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FPREM", "FYL2XP1", "FSQRT", "ESC_D9",</span><br><span style="color: hsl(0, 100%, 40%);">- "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FPREM", "FYL2XP1", "FSQRT", "ESC_D9",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",</span><br><span> };</span><br><span> </span><br><span> #endif /* DEBUG */</span><br><span>@@ -100,226 +100,227 @@</span><br><span> /* opcode=0xd9 */</span><br><span> void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span> #ifdef DEBUG</span><br><span style="color: hsl(0, 100%, 40%);">- if (mod != 3) {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (mod != 3)</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- if (rh < 4) {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("ST(%d)\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rh < 4) {</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("ST(%d)\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- /* execute */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_nop();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- /* 2,3,6,7 */</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* execute */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_nop();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 2,3,6,7 */</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- /* 7 */</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 7 */</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_decstp();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_incstp();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_decstp();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_incstp();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* X86EMU_FPU_PRESENT */</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fldenv(X86EMU_FPU_WORD,</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstenv(X86EMU_FPU_WORD,</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* X86EMU_FPU_PRESENT */</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> </span><br><span> static const char *x86emu_fpu_op_da_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tDWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tDWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tDWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",</span><br><span> };</span><br><span> </span><br><span> #endif /* DEBUG */</span><br><span>@@ -327,80 +328,83 @@</span><br><span> /* opcode=0xda */</span><br><span> void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> </span><br><span> static const char *x86emu_fpu_op_db_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tDWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",</span><br><span> };</span><br><span> </span><br><span> #endif /* DEBUG */</span><br><span>@@ -408,544 +412,544 @@</span><br><span> /* opcode=0xdb */</span><br><span> void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span> #ifdef DEBUG</span><br><span style="color: hsl(0, 100%, 40%);">- if (mod != 3) {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- } else if (rh == 4) { /* === 11 10 0 nnn */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("FENI\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("FDISI\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("FCLEX\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("FINIT\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* DEBUG */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (mod != 3) {</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else if (rh == 4) { /* === 11 10 0 nnn */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("FENI\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("FDISI\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("FCLEX\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("FINIT\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- /* execute */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rl) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_feni();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fdisi();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fclex();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_finit();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* execute */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_feni();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fdisi();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fclex();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_finit();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> static const char *x86emu_fpu_op_dc_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FDIVR\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FDIVR\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FDIVR\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FDIVR\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FDIVR\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FCOMP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FDIVR\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",</span><br><span> };</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* DEBUG */</span><br><span> </span><br><span> /* opcode=0xdc */</span><br><span> void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- /* execute */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* execute */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> </span><br><span> static const char *x86emu_fpu_op_dd_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* DEBUG */</span><br><span> </span><br><span> /* opcode=0xdd */</span><br><span> void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_ffree(stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fxch(stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fst(stkelem); /* register version */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fstp(stkelem); /* register version */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_ffree(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fxch(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fst(stkelem); /* register version */</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fstp(stkelem); /* register version */</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const char *x86emu_fpu_op_de_tab[] =</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *x86emu_fpu_op_de_tab[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FIDIVR\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FICOMP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FIDIVR\tWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* DEBUG */</span><br><span> </span><br><span> /* opcode=0xde */</span><br><span> void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("\tST(%d),ST\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- if (stkelem == 1)</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- else</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ if (stkelem == 1)</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span> </span><br><span> #ifdef DEBUG</span><br><span> </span><br><span> static const char *x86emu_fpu_op_df_tab[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- /* mod == 00 */</span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ /* mod == 00 */</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* mod == 01 */</span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ /* mod == 01 */</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* mod == 10 */</span><br><span style="color: hsl(0, 100%, 40%);">- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(0, 100%, 40%);">- "FISTP\tQWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ /* mod == 10 */</span><br><span style="color: hsl(120, 100%, 40%);">+ "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "FISTP\tQWORD PTR ",</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* mod == 11 */</span><br><span style="color: hsl(0, 100%, 40%);">- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",</span><br><span style="color: hsl(0, 100%, 40%);">- "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"</span><br><span style="color: hsl(120, 100%, 40%);">+ /* mod == 11 */</span><br><span style="color: hsl(120, 100%, 40%);">+ "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",</span><br><span style="color: hsl(120, 100%, 40%);">+ "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* DEBUG */</span><br><span> </span><br><span> /* opcode=0xdf */</span><br><span> void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int mod, rl, rh;</span><br><span style="color: hsl(0, 100%, 40%);">- uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- u8 X86EMU_FPU_ONLY(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ int mod, rl, rh;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint X86EMU_FPU_ONLY(destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 X86EMU_FPU_ONLY(stkelem);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- START_OF_INSTR();</span><br><span style="color: hsl(0, 100%, 40%);">- FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF("\n");</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3: /* register to register */</span><br><span style="color: hsl(0, 100%, 40%);">- stkelem = (u8)rl;</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_PRINTF2("\tST(%d)\n", stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ START_OF_INSTR();</span><br><span style="color: hsl(120, 100%, 40%);">+ FETCH_DECODE_MODRM(mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm00_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm01_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ destoffset = decode_rm10_address(rl);</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF("\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3: /* register to register */</span><br><span style="color: hsl(120, 100%, 40%);">+ stkelem = (u8) rl;</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_PRINTF2("\tST(%d)\n", stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #ifdef X86EMU_FPU_PRESENT</span><br><span style="color: hsl(0, 100%, 40%);">- switch (mod) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_ffree(stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fxch(stkelem);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fst(stkelem); /* register version */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_R_fstp(stkelem); /* register version */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- switch (rh) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_illegal();</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 3:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 4:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 5:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 6:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 7:</span><br><span style="color: hsl(0, 100%, 40%);">- x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (mod) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_ffree(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fxch(stkelem);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fst(stkelem); /* register version */</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_R_fstp(stkelem); /* register version */</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rh) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_illegal();</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7:</span><br><span style="color: hsl(120, 100%, 40%);">+ x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">- DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(0, 100%, 40%);">- END_OF_INSTR_NO_TRACE();</span><br><span style="color: hsl(120, 100%, 40%);">+ DECODE_CLEAR_SEGOVR();</span><br><span style="color: hsl(120, 100%, 40%);">+ END_OF_INSTR_NO_TRACE();</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26355">change 26355</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26355"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia96926570f638820f1414e23983bce9ee61d5b24 </div>
<div style="display:none"> Gerrit-Change-Number: 26355 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>