<p>Nick Vaccaro has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26319">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/poppy/variants/nocturne: enable I2C #5 bus<br><br>BUG=b:79784124<br>BRANCH=none<br>TEST='emerge-nocturne coreboot chromeos-bootimage' and verify i2c bus #5<br>is detected.<br><br>Change-Id: Ic5b754fb97231aeab0278d71f8ced9343c30feda<br>Signed-off-by: Nick Vaccaro <nvaccaro@google.com><br>---<br>M src/mainboard/google/poppy/variants/nocturne/devicetree.cb<br>1 file changed, 2 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/26319/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb</span><br><span>index 61df213..5ab7fe7 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb</span><br><span>+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb</span><br><span>@@ -229,7 +229,7 @@</span><br><span>             [PchSerialIoIndexI2C2]  = PchSerialIoDisabled,</span><br><span>               [PchSerialIoIndexI2C3]  = PchSerialIoPci,</span><br><span>            [PchSerialIoIndexI2C4]  = PchSerialIoPci,</span><br><span style="color: hsl(0, 100%, 40%);">-               [PchSerialIoIndexI2C5]  = PchSerialIoDisabled,</span><br><span style="color: hsl(120, 100%, 40%);">+                [PchSerialIoIndexI2C5]  = PchSerialIoPci,</span><br><span>            [PchSerialIoIndexSpi0]  = PchSerialIoPci,</span><br><span>            [PchSerialIoIndexSpi1]  = PchSerialIoPci,</span><br><span>            [PchSerialIoIndexUart0] = PchSerialIoSkipInit,</span><br><span>@@ -266,7 +266,7 @@</span><br><span>                 device pci 16.4 off end # Management Engine Interface 3</span><br><span>              device pci 17.0 off end # SATA</span><br><span>               device pci 19.0 on  end # UART #2</span><br><span style="color: hsl(0, 100%, 40%);">-               device pci 19.1 off end # I2C #5</span><br><span style="color: hsl(120, 100%, 40%);">+              device pci 19.1 on  end # I2C #5</span><br><span>             device pci 19.2 on</span><br><span>                   chip drivers/i2c/max98373</span><br><span>                            register "vmon_slot_no" = "4"</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26319">change 26319</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26319"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic5b754fb97231aeab0278d71f8ced9343c30feda </div>
<div style="display:none"> Gerrit-Change-Number: 26319 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nick Vaccaro <nvaccaro@google.com> </div>