<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26252">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/i82801ax: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I5c18fdc24bd0432f6b7a1131af68c792d377c3ac<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/intel/i82801ax/i82801ax.c<br>M src/southbridge/intel/i82801ax/i82801ax.h<br>M src/southbridge/intel/i82801ax/lpc.c<br>M src/southbridge/intel/i82801ax/smbus.c<br>M src/southbridge/intel/i82801ax/watchdog.c<br>5 files changed, 10 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/26252/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/i82801ax/i82801ax.c b/src/southbridge/intel/i82801ax/i82801ax.c</span><br><span>index 7ef22e2..37c264e 100644</span><br><span>--- a/src/southbridge/intel/i82801ax/i82801ax.c</span><br><span>+++ b/src/southbridge/intel/i82801ax/i82801ax.c</span><br><span>@@ -21,10 +21,10 @@</span><br><span> #include <device/pci.h></span><br><span> #include "i82801ax.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void i82801ax_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void i82801ax_enable(struct device *dev)</span><br><span> {</span><br><span> u16 reg16, index;</span><br><span style="color: hsl(0, 100%, 40%);">- device_t lpc_dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *lpc_dev;</span><br><span> </span><br><span> /* Search for the 82801AA/AB LPC device (D31:F0) on PCI bus 0. */</span><br><span> lpc_dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span>diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h</span><br><span>index 879c25a..a23da35 100644</span><br><span>--- a/src/southbridge/intel/i82801ax/i82801ax.h</span><br><span>+++ b/src/southbridge/intel/i82801ax/i82801ax.h</span><br><span>@@ -19,7 +19,7 @@</span><br><span> </span><br><span> #if !defined(__PRE_RAM__)</span><br><span> #include "chip.h"</span><br><span style="color: hsl(0, 100%, 40%);">-void i82801ax_enable(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void i82801ax_enable(struct device *dev);</span><br><span> #else</span><br><span> void enable_smbus(void);</span><br><span> int smbus_read_byte(u8 device, u8 address);</span><br><span>diff --git a/src/southbridge/intel/i82801ax/lpc.c b/src/southbridge/intel/i82801ax/lpc.c</span><br><span>index 29ed036..44ea03b 100644</span><br><span>--- a/src/southbridge/intel/i82801ax/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801ax/lpc.c</span><br><span>@@ -118,7 +118,7 @@</span><br><span> /* TODO: Explain/#define the real meaning of these magic numbers. */</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801ax_pirq_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801ax_pirq_init(struct device *dev)</span><br><span> {</span><br><span> u8 reg8;</span><br><span> config_t *config = dev->chip_info;</span><br><span>@@ -136,7 +136,7 @@</span><br><span> pci_write_config8(dev, PIRQD_ROUT, reg8);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801ax_power_options(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801ax_power_options(struct device *dev)</span><br><span> {</span><br><span> uint8_t byte;</span><br><span> int pwr_on = -1;</span><br><span>@@ -166,7 +166,7 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void gpio_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void gpio_init(struct device *dev)</span><br><span> {</span><br><span> pci_write_config32(dev, GPIO_BASE, (GPIO_BASE_ADDR | 1));</span><br><span> pci_write_config8(dev, GPIO_CNTL, GPIO_EN);</span><br><span>@@ -207,7 +207,7 @@</span><br><span> pci_write_config16(dev, PCI_DMA_CFG, reg16);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801ax_lpc_decode_en(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801ax_lpc_decode_en(struct device *dev)</span><br><span> {</span><br><span> /* Decode 0x3F8-0x3FF (COM1) for COMA port, 0x2F8-0x2FF (COM2) for COMB.</span><br><span> * LPT decode defaults to 0x378-0x37F and 0x778-0x77F.</span><br><span>@@ -251,7 +251,7 @@</span><br><span> i82801ax_lpc_decode_en(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801ax_lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801ax_lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span> struct resource *res;</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801ax/smbus.c b/src/southbridge/intel/i82801ax/smbus.c</span><br><span>index 1e71a98..d76ab92 100644</span><br><span>--- a/src/southbridge/intel/i82801ax/smbus.c</span><br><span>+++ b/src/southbridge/intel/i82801ax/smbus.c</span><br><span>@@ -22,7 +22,7 @@</span><br><span> #include <southbridge/intel/common/smbus.h></span><br><span> #include "i82801ax.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int lsmbus_read_byte(device_t dev, u8 address)</span><br><span style="color: hsl(120, 100%, 40%);">+static int lsmbus_read_byte(struct device *dev, u8 address)</span><br><span> {</span><br><span> u16 device;</span><br><span> struct resource *res;</span><br><span>diff --git a/src/southbridge/intel/i82801ax/watchdog.c b/src/southbridge/intel/i82801ax/watchdog.c</span><br><span>index 60a7b57..d0af76c 100644</span><br><span>--- a/src/southbridge/intel/i82801ax/watchdog.c</span><br><span>+++ b/src/southbridge/intel/i82801ax/watchdog.c</span><br><span>@@ -24,7 +24,7 @@</span><br><span> </span><br><span> void watchdog_off(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> unsigned long value, base;</span><br><span> </span><br><span> /* Turn off the ICH5 watchdog. */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26252">change 26252</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26252"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5c18fdc24bd0432f6b7a1131af68c792d377c3ac </div>
<div style="display:none"> Gerrit-Change-Number: 26252 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>