<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26251">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/i82371eb: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: Ie366a49045940747eb5cc1e38316cce31c5774cb<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/intel/i82371eb/acpi_tables.c<br>M src/southbridge/intel/i82371eb/fadt.c<br>M src/southbridge/intel/i82371eb/i82371eb.h<br>M src/southbridge/intel/i82371eb/isa.c<br>4 files changed, 6 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/26251/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c</span><br><span>index 59d5dea..9a720e2 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/acpi_tables.c</span><br><span>+++ b/src/southbridge/intel/i82371eb/acpi_tables.c</span><br><span>@@ -26,7 +26,7 @@</span><br><span> </span><br><span> static int determine_total_number_of_cores(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-  device_t cpu;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *cpu;</span><br><span>  int count = 0;</span><br><span>       for (cpu = all_devices; cpu; cpu = cpu->next) {</span><br><span>           if ((cpu->path.type != DEVICE_PATH_APIC) ||</span><br><span>@@ -41,7 +41,7 @@</span><br><span>   return count;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void generate_cpu_entries(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+void generate_cpu_entries(struct device *device)</span><br><span> {</span><br><span>      int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6;</span><br><span>         int numcpus = determine_total_number_of_cores();</span><br><span>diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c</span><br><span>index b77ed4a..41ad31c 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/fadt.c</span><br><span>+++ b/src/southbridge/intel/i82371eb/fadt.c</span><br><span>@@ -31,7 +31,7 @@</span><br><span> void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)</span><br><span> {</span><br><span>        acpi_header_t *header = &(fadt->header);</span><br><span style="color: hsl(0, 100%, 40%);">- device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> </span><br><span>      /* Power management controller */</span><br><span>    dev = dev_find_device(PCI_VENDOR_ID_INTEL,</span><br><span>diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h</span><br><span>index 6908b45..1fea0ff 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/i82371eb.h</span><br><span>+++ b/src/southbridge/intel/i82371eb/i82371eb.h</span><br><span>@@ -23,7 +23,7 @@</span><br><span> #include <device/device.h></span><br><span> #include "chip.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void i82371eb_enable(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void i82371eb_enable(struct device *dev);</span><br><span> void i82371eb_hard_reset(void);</span><br><span> #else</span><br><span> void enable_smbus(void);</span><br><span>diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c</span><br><span>index 2bab05c..8030a75 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/isa.c</span><br><span>+++ b/src/southbridge/intel/i82371eb/isa.c</span><br><span>@@ -36,7 +36,7 @@</span><br><span>        u8 ioapic_id = 2;</span><br><span>    volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR);</span><br><span>         volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);</span><br><span style="color: hsl(0, 100%, 40%);">-      device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span> </span><br><span>      dev = dev_find_device(PCI_VENDOR_ID_INTEL,</span><br><span>                         PCI_DEVICE_ID_INTEL_82371AB_ISA, 0);</span><br><span>@@ -125,7 +125,7 @@</span><br><span> }</span><br><span> </span><br><span> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)</span><br><span style="color: hsl(0, 100%, 40%);">-static void southbridge_acpi_fill_ssdt_generator(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void southbridge_acpi_fill_ssdt_generator(struct device *device)</span><br><span> {</span><br><span>  acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");</span><br><span>    generate_cpu_entries(device);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26251">change 26251</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26251"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie366a49045940747eb5cc1e38316cce31c5774cb </div>
<div style="display:none"> Gerrit-Change-Number: 26251 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>