<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26255">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/i82801dx: Get rid of device_t<br><br>Use of device_t has been abandoned in ramstage.<br><br>Change-Id: I36f064b67f14556e38b41b7f64c3e27d8d935367<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/intel/i82801dx/i82801dx.c<br>M src/southbridge/intel/i82801dx/i82801dx.h<br>M src/southbridge/intel/i82801dx/lpc.c<br>3 files changed, 8 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/26255/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c</span><br><span>index a4eb048..cc70fdd 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/i82801dx.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/i82801dx.c</span><br><span>@@ -20,7 +20,7 @@</span><br><span> #include <device/pci_ids.h></span><br><span> #include "i82801dx.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void i82801dx_enable(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void i82801dx_enable(struct device *dev)</span><br><span> {</span><br><span>       unsigned int index = 0;</span><br><span>      uint8_t bHasDisableBit = 0;</span><br><span>@@ -28,7 +28,7 @@</span><br><span> </span><br><span> //      all 82801dbm devices are in bus 0</span><br><span>     unsigned int devfn = PCI_DEVFN(0x1f, 0);        // lpc</span><br><span style="color: hsl(0, 100%, 40%);">-  device_t lpc_dev = dev_find_slot(0, devfn);     // 0</span><br><span style="color: hsl(120, 100%, 40%);">+  struct device *lpc_dev = dev_find_slot(0, devfn);       // 0</span><br><span>         if (!lpc_dev)</span><br><span>                return;</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>index 14ca28f..8c7da55 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>+++ b/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>@@ -32,7 +32,7 @@</span><br><span> #if !defined(__ASSEMBLER__)</span><br><span> #if !defined(__SIMPLE_DEVICE__)</span><br><span> #include "chip.h"</span><br><span style="color: hsl(0, 100%, 40%);">-extern void i82801dx_enable(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+extern void i82801dx_enable(struct device *dev);</span><br><span> #else</span><br><span> void enable_smbus(void);</span><br><span> int smbus_read_byte(unsigned device, unsigned address);</span><br><span>diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>index 0f0bbcf..925251d 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>@@ -81,7 +81,7 @@</span><br><span>                         (1 << 7) | (0 << 6) | ((21 - 17) << 2) | (0 << 0));</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801dx_pirq_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801dx_pirq_init(struct device *dev)</span><br><span> {</span><br><span>  /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span>@@ -96,7 +96,7 @@</span><br><span>    pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801dx_power_options(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801dx_power_options(struct device *dev)</span><br><span> {</span><br><span>  u8 reg8;</span><br><span>     u16 reg16, pmbase;</span><br><span>@@ -175,7 +175,7 @@</span><br><span>     outl(reg32, pmbase + 0x04);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void gpio_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void gpio_init(struct device *dev)</span><br><span> {</span><br><span>      /* This should be done in romstage.c already */</span><br><span>      pci_write_config32(dev, GPIO_BASE, (GPIOBASE_ADDR | 1));</span><br><span>@@ -217,7 +217,7 @@</span><br><span>       pci_write_config16(dev, PCI_DMA_CFG, reg16);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801dx_lpc_decode_en(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801dx_lpc_decode_en(struct device *dev)</span><br><span> {</span><br><span>   /* Decode 0x3F8-0x3FF (COM1) for COMA port, 0x2F8-0x2FF (COM2) for COMB.</span><br><span>      * LPT decode defaults to 0x378-0x37F and 0x778-0x77F.</span><br><span>@@ -301,7 +301,7 @@</span><br><span>         enable_hpet(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void i82801dx_lpc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void i82801dx_lpc_read_resources(struct device *dev)</span><br><span> {</span><br><span>    struct resource *res;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26255">change 26255</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26255"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I36f064b67f14556e38b41b7f64c3e27d8d935367 </div>
<div style="display:none"> Gerrit-Change-Number: 26255 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>