<p>Raul Rangel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26219">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">grunt: use stage cache when waking from S3<br><br>BUG=b:79154155<br>TEST=built and tested on grunt<br>31 entries total:<br><br> 0:1st timestamp 20,917<br> 900:calling AmdInitReset 87,525 (66,608)<br> 901:back from AmdInitReset 98,318 (10,793)<br> 902:calling AmdInitEarly 99,165 (847)<br> 903:back from AmdInitEarly 139,619 (40,454)<br> 5:start of verified boot 156,301 (16,682)<br> 503:starting to initialize TPM 156,697 (396)<br> 504:finished TPM initialization 186,107 (29,410)<br> 505:starting to verify keyblock/preamble (RSA) 187,316 (1,209)<br> 506:finished verifying keyblock/preamble (RSA) 208,000 (20,684)<br> 507:starting to verify body (load+SHA2+RSA) 208,108 (108)<br> 508:finished loading body (ignore for x86) 273,238 (65,130)<br> 509:finished calculating body hash (SHA2) 290,364 (17,126)<br> 510:finished verifying body signature (RSA) 294,236 (3,872)<br> 511:starting TPM PCR extend 295,071 (835)<br> 512:finished TPM PCR extend 320,512 (25,441)<br> 513:starting locking TPM 320,514 (2)<br> 514:finished locking TPM 332,081 (11,567)<br> 6:end of verified boot 332,083 (2)<br> 13:starting to load romstage 332,187 (104)<br> 4:end of romstage 395,559 (63,372)<br> 10:start of ramstage 395,999 (440)<br> 916:calling AmdS3LateRestore 396,135 (136)<br> 917:back from AmdS3LateRestore 428,066 (31,931)<br> 30:device enumeration 428,087 (21)<br> 40:device configuration 434,640 (6,553)<br> 50:device enable 438,185 (3,545)<br> 60:device initialization 439,565 (1,380)<br> 70:device setup done 453,326 (13,761)<br> 918:calling AmdS3FinalRestore 454,363 (1,037)<br> 919:back from AmdS3FinalRestore 455,520 (1,157)<br> 98:ACPI wake jump 467,541 (12,021)<br><br>Total Time: 446,624<br><br>Change-Id: I326e81d3c987130e258c616c7c66dd82ddc0d942<br>Signed-off-by: Raul E Rangel <rrangel@chromium.org><br>---<br>M src/soc/amd/common/block/pi/agesawrapper.c<br>1 file changed, 17 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/26219/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>index f72810f..2b7cc60 100644</span><br><span>--- a/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>+++ b/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>@@ -22,6 +22,7 @@</span><br><span> #include <delay.h></span><br><span> #include <rules.h></span><br><span> #include <rmodule.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stage_cache.h></span><br><span> #include <string.h></span><br><span> #include <timestamp.h></span><br><span> #include <amdblocks/s3_resume.h></span><br><span>@@ -559,10 +560,22 @@</span><br><span> .prog = &prog,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (prog_locate(&prog))</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- if (rmodule_stage_load(&rmod_agesa) < 0)</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (acpi_is_wakeup_s3() && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO, "AGESA: Loading stage from cache\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ // There is no way to tell if this succeeded.</span><br><span style="color: hsl(120, 100%, 40%);">+ stage_cache_load_stage(STAGE_REFCODE, &prog);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (prog_locate(&prog))</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rmodule_stage_load(&rmod_agesa) < 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!acpi_is_wakeup_s3() && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO, "AGESA: Saving stage to cache\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ stage_cache_add(STAGE_REFCODE, &prog);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> </span><br><span> return rdev_chain(rdev, prog_rdev(&prog), 0,</span><br><span> region_device_sz(prog_rdev(&prog)));</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26219">change 26219</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26219"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I326e81d3c987130e258c616c7c66dd82ddc0d942 </div>
<div style="display:none"> Gerrit-Change-Number: 26219 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Raul Rangel <rrangel@chromium.org> </div>