<p>Kevin Cody-Little has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26193">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/asus/am1i-a: get the TPM working<br><br>There were no PNP or ACPI entries for the LPC TPM, so although the<br>header was active and LPC worked over it, Linux would not see the<br>actual TPM chip attached thereto.<br><br>Tested with ASUS's TPM/FW 3.19 module and the trousers tools.<br><br>Repairs were somewhat involved:<br><br>Add PNP entry for the LPC TPM to the board's devicetree.cb.<br><br>Add Kconfig entry to indicate the mainboard has an LPC TPM.<br><br>Add ACPI name functions to southbridge/amd/agesa/hudson/lpc.c and<br>to northbridge/amd/agesa/family16kb/northbridge.c so that the TPM<br>would register itself to the correct namespace; otherwise turning<br>on TPM breaks the ACPI tables, and the payload won't find SATA.<br><br>Alter the pc80/tpm/tis.c driver to get is port value from PNP; it<br>was previously hardcoded to 2e, where the SuperIO is.<br><br>Add the init_tpm() call to drivers/amd/agesa/romstage.c<br><br>Change-Id: I8c1aea245f81fa44a6bdd5301bbee958cbcdfaaa<br>Signed-off-by: Kevin Cody-Little <kcodyjr@gmail.com><br>---<br>M src/drivers/amd/agesa/romstage.c<br>M src/drivers/pc80/tpm/tis.c<br>M src/mainboard/asus/am1i-a/Kconfig<br>M src/mainboard/asus/am1i-a/devicetree.cb<br>M src/northbridge/amd/agesa/family16kb/northbridge.c<br>M src/southbridge/amd/agesa/hudson/lpc.c<br>6 files changed, 37 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/26193/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c</span><br><span>index 197a007..4c319e6 100644</span><br><span>--- a/src/drivers/amd/agesa/romstage.c</span><br><span>+++ b/src/drivers/amd/agesa/romstage.c</span><br><span>@@ -29,6 +29,10 @@</span><br><span> #include <northbridge/amd/agesa/agesa_helper.h></span><br><span> #include <northbridge/amd/agesa/state_machine.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(120, 100%, 40%);">+#include <security/tpm/tis.h></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)</span><br><span> #error "Only EARLY_CBMEM_INIT is supported."</span><br><span> #endif</span><br><span>@@ -112,6 +116,10 @@</span><br><span> </span><br><span> romstage_handoff_init(cb->s3resume);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(120, 100%, 40%);">+ init_tpm(cb->s3resume);</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> postcar_frame_init(&pcf, HIGH_ROMSTAGE_STACK_SIZE);</span><br><span> recover_postcar_frame(&pcf, cb->s3resume);</span><br><span> </span><br><span>diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c</span><br><span>index 714b7e5..3549173 100644</span><br><span>--- a/src/drivers/pc80/tpm/tis.c</span><br><span>+++ b/src/drivers/pc80/tpm/tis.c</span><br><span>@@ -904,11 +904,13 @@</span><br><span> else</span><br><span> acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_OFF);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ u16 port = dev->path.pnp.port;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Resources */</span><br><span> acpigen_write_name("_CRS");</span><br><span> acpigen_write_resourcetemplate_header();</span><br><span> acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000);</span><br><span style="color: hsl(0, 100%, 40%);">- acpigen_write_io16(0x2e, 0x2e, 1, 2, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ acpigen_write_io16(port, port, 1, 2, 1);</span><br><span> </span><br><span> if (CONFIG_TPM_PIRQ) {</span><br><span> /*</span><br><span>diff --git a/src/mainboard/asus/am1i-a/Kconfig b/src/mainboard/asus/am1i-a/Kconfig</span><br><span>index e0a78ff..56d5d0c 100644</span><br><span>--- a/src/mainboard/asus/am1i-a/Kconfig</span><br><span>+++ b/src/mainboard/asus/am1i-a/Kconfig</span><br><span>@@ -16,6 +16,7 @@</span><br><span> select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB</span><br><span> select SOUTHBRIDGE_AMD_AGESA_YANGTZE</span><br><span> select SUPERIO_ITE_IT8623E</span><br><span style="color: hsl(120, 100%, 40%);">+ select MAINBOARD_HAS_LPC_TPM</span><br><span> </span><br><span> config MAINBOARD_DIR</span><br><span> string</span><br><span>diff --git a/src/mainboard/asus/am1i-a/devicetree.cb b/src/mainboard/asus/am1i-a/devicetree.cb</span><br><span>index b810487..4fcd13e 100644</span><br><span>--- a/src/mainboard/asus/am1i-a/devicetree.cb</span><br><span>+++ b/src/mainboard/asus/am1i-a/devicetree.cb</span><br><span>@@ -85,6 +85,9 @@</span><br><span> io 0x62 = 0x300</span><br><span> end</span><br><span> end #superio/ite/it8623e</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 4e.0 on end # TPM module</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> end #device pci 14.3 # LPC</span><br><span> device pci 14.7 off end # SD - no card reader present</span><br><span> end #chip southbridge/amd/agesa/hudson</span><br><span>diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c</span><br><span>index f667f6f..8e5e472 100644</span><br><span>--- a/src/northbridge/amd/agesa/family16kb/northbridge.c</span><br><span>+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c</span><br><span>@@ -795,11 +795,20 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *domain_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return "PCI0";</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static struct device_operations pci_domain_ops = {</span><br><span> .read_resources = domain_read_resources,</span><br><span> .set_resources = domain_set_resources,</span><br><span> .init = DEVICE_NOOP,</span><br><span> .scan_bus = pci_domain_scan_bus,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = domain_acpi_name,</span><br><span> };</span><br><span> </span><br><span> static void sysconf_init(device_t dev) // first node</span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>index 1166054..7ada832 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/lpc.c</span><br><span>@@ -29,6 +29,7 @@</span><br><span> #include <pc80/i8254.h></span><br><span> #include <pc80/i8259.h></span><br><span> #include "hudson.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include "pci_devs.h"</span><br><span> </span><br><span> static void lpc_init(device_t dev)</span><br><span> {</span><br><span>@@ -318,6 +319,17 @@</span><br><span> hudson_lpc_enable_childrens_resources(dev);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *lpc_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type != DEVICE_PATH_PCI)</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.pci.devfn == LPC_DEVFN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return "LIBR";</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> unsigned long acpi_fill_mcfg(unsigned long current)</span><br><span> {</span><br><span> /* Just a dummy */</span><br><span>@@ -338,6 +350,7 @@</span><br><span> .init = lpc_init,</span><br><span> .scan_bus = scan_lpc_bus,</span><br><span> .ops_pci = &lops_pci,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = lpc_acpi_name,</span><br><span> };</span><br><span> static const struct pci_driver lpc_driver __pci_driver = {</span><br><span> .ops = &lpc_ops,</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26193">change 26193</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26193"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8c1aea245f81fa44a6bdd5301bbee958cbcdfaaa </div>
<div style="display:none"> Gerrit-Change-Number: 26193 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kevin Cody-Little <kcodyjr@gmail.com> </div>