<p>Julius Werner has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26182">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">bootmem: Keep OS memory map separate from the start<br><br>The patch series ending in 64049be (lib/bootmem: Add method to walk OS<br>POV memory tables) expanded the bootmem framework to also keep track of<br>memory regions that are only relevant while coreboot is still executing,<br>such as the ramstage code and data. Mixing this into the exsting bootmem<br>ranges has already caused an issue on CONFIG_RELOCATEABLE_RAMSTAGE<br>boards, because the ramstage code in CBMEM is marked as BM_RAMSTAGE<br>which ends up getting translated back to LB_RAM in the OS tables. This<br>was fixed in 1ecec5f (lib/bootmem: ensure ramstage memory isn't given to<br>OS) for this specific case, but unfortunately Arm boards can have a<br>similar problem where their stack space is sometimes located in an SRAM<br>region that should not be made available as RAM to the OS.<br><br>Since both the resources made available to the OS and the regions<br>reserved for coreboot can be different for each platform, we should find<br>a generic solution to this rather than trying to deal with each issue<br>individually. This patch solves the problem by keeping the OS point of<br>view and the coreboot-specific ranges separate from the start, rather<br>than cloning it out later. Ranges only relevant to the coreboot view<br>will never touch the OS-specific layout, to avoid the problem of losing<br>information about the original memory type of the underlying region that<br>needs to be restored for the OS view. This both supersedes the<br>RELOCATABLE_RAMSTAGE fix and resolves the problems on Arm boards.<br><br>Change-Id: I7bb018456b58ad9b0cfb0b8da8c26b791b487fbb<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M src/include/bootmem.h<br>M src/lib/bootmem.c<br>2 files changed, 12 insertions(+), 26 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/26182/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/include/bootmem.h b/src/include/bootmem.h</span><br><span>index 7503306..0a960c9 100644</span><br><span>--- a/src/include/bootmem.h</span><br><span>+++ b/src/include/bootmem.h</span><br><span>@@ -38,6 +38,8 @@</span><br><span> BM_MEM_UNUSABLE, /* Unusable address space */</span><br><span> BM_MEM_VENDOR_RSVD, /* Vendor Reserved */</span><br><span> BM_MEM_TABLE, /* Ram configuration tables are kept in */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Tags below this point are ignored for the OS table. */</span><br><span style="color: hsl(120, 100%, 40%);">+ BM_MEM_OS_CUTOFF = BM_MEM_TABLE,</span><br><span> BM_MEM_RAMSTAGE,</span><br><span> BM_MEM_PAYLOAD,</span><br><span> BM_MEM_LAST, /* Last entry in this list */</span><br><span>diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c</span><br><span>index fd9195a..a209796 100644</span><br><span>--- a/src/lib/bootmem.c</span><br><span>+++ b/src/lib/bootmem.c</span><br><span>@@ -67,17 +67,6 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void bootmem_convert_ranges(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /**</span><br><span style="color: hsl(0, 100%, 40%);">- * Convert BM_MEM_RAMSTAGE and BM_MEM_PAYLOAD to BM_MEM_RAM and</span><br><span style="color: hsl(0, 100%, 40%);">- * merge ranges. The payload doesn't care about memory used by firmware.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- memranges_clone(&bootmem_os, &bootmem);</span><br><span style="color: hsl(0, 100%, 40%);">- memranges_update_tag(&bootmem_os, BM_MEM_RAMSTAGE, BM_MEM_RAM);</span><br><span style="color: hsl(0, 100%, 40%);">- memranges_update_tag(&bootmem_os, BM_MEM_PAYLOAD, BM_MEM_RAM);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void bootmem_init(void)</span><br><span> {</span><br><span> const unsigned long cacheable = IORESOURCE_CACHEABLE;</span><br><span>@@ -93,24 +82,18 @@</span><br><span> */</span><br><span> memranges_init(bm, cacheable, cacheable, BM_MEM_RAM);</span><br><span> memranges_add_resources(bm, reserved, reserved, BM_MEM_RESERVED);</span><br><span style="color: hsl(120, 100%, 40%);">+ memranges_clone(&bootmem_os, bm);</span><br><span> </span><br><span> /* Add memory used by CBMEM. */</span><br><span> cbmem_add_bootmem();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Add memory used by coreboot -- only if RELOCATABLE_RAMSTAGE is not</span><br><span style="color: hsl(0, 100%, 40%);">- * used. When RELOCATABLE_RAMSTAGE is employed ramstage lives in cbmem</span><br><span style="color: hsl(0, 100%, 40%);">- * so cbmem_add_bootmem() takes care of that memory region. */</span><br><span style="color: hsl(0, 100%, 40%);">- if (!IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) {</span><br><span style="color: hsl(0, 100%, 40%);">- bootmem_add_range((uintptr_t)_stack, _stack_size,</span><br><span style="color: hsl(0, 100%, 40%);">- BM_MEM_RAMSTAGE);</span><br><span style="color: hsl(0, 100%, 40%);">- bootmem_add_range((uintptr_t)_program, _program_size,</span><br><span style="color: hsl(0, 100%, 40%);">- BM_MEM_RAMSTAGE);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ bootmem_add_range((uintptr_t)_stack, _stack_size,</span><br><span style="color: hsl(120, 100%, 40%);">+ BM_MEM_RAMSTAGE);</span><br><span style="color: hsl(120, 100%, 40%);">+ bootmem_add_range((uintptr_t)_program, _program_size,</span><br><span style="color: hsl(120, 100%, 40%);">+ BM_MEM_RAMSTAGE);</span><br><span> </span><br><span> bootmem_arch_add_ranges();</span><br><span> bootmem_platform_add_ranges();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- bootmem_convert_ranges();</span><br><span> }</span><br><span> </span><br><span> void bootmem_add_range(uint64_t start, uint64_t size,</span><br><span>@@ -118,10 +101,11 @@</span><br><span> {</span><br><span> assert(tag > BM_MEM_FIRST && tag < BM_MEM_LAST);</span><br><span> assert(bootmem_is_initialized());</span><br><span style="color: hsl(0, 100%, 40%);">- assert(!bootmem_memory_table_written() || tag == BM_MEM_RAMSTAGE ||</span><br><span style="color: hsl(0, 100%, 40%);">- tag == BM_MEM_PAYLOAD);</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(!bootmem_memory_table_written() || tag > BM_MEM_OS_CUTOFF);</span><br><span> </span><br><span> memranges_insert(&bootmem, start, size, tag);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (tag <= BM_MEM_OS_CUTOFF)</span><br><span style="color: hsl(120, 100%, 40%);">+ memranges_insert(&bootmem_os, start, size, tag);</span><br><span> }</span><br><span> </span><br><span> void bootmem_write_memory_table(struct lb_memory *mem)</span><br><span>@@ -159,8 +143,8 @@</span><br><span> { BM_MEM_UNUSABLE, "UNUSABLE" },</span><br><span> { BM_MEM_VENDOR_RSVD, "VENDOR RESERVED" },</span><br><span> { BM_MEM_TABLE, "CONFIGURATION TABLES" },</span><br><span style="color: hsl(0, 100%, 40%);">- { BM_MEM_RAMSTAGE, "RAM, RAMSTAGE" },</span><br><span style="color: hsl(0, 100%, 40%);">- { BM_MEM_PAYLOAD, "RAM, PAYLOAD" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { BM_MEM_RAMSTAGE, "RAMSTAGE" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { BM_MEM_PAYLOAD, "PAYLOAD" },</span><br><span> };</span><br><span> </span><br><span> static const char *bootmem_range_string(const enum bootmem_type tag)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26182">change 26182</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7bb018456b58ad9b0cfb0b8da8c26b791b487fbb </div>
<div style="display:none"> Gerrit-Change-Number: 26182 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>