<p>Maulik V Vaghela has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26164">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block: Move common uart function to block/uart<br><br>This patch moves uart functions which are common across multiple soc to<br>block/uart. This will remove redundant code copy from soc<br>{skylake/apollolake/cannonlake}.<br><br>BUG=none<br>BRANCH=none<br>TEST=Build and boot on KBL/APL/CNL platform.<br><br>Change-Id: I109d0e5c942e499cb763bde47cb7d53dfbf5cef6<br>Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com><br>---<br>M src/soc/intel/apollolake/include/soc/iomap.h<br>M src/soc/intel/apollolake/uart.c<br>M src/soc/intel/cannonlake/uart.c<br>M src/soc/intel/common/block/uart/uart.c<br>M src/soc/intel/skylake/uart.c<br>5 files changed, 42 insertions(+), 121 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/26164/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>index 9a2500c..dc0b18e 100644</span><br><span>--- a/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>+++ b/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>@@ -54,4 +54,12 @@</span><br><span> #define EARLY_I2C_BASE_ADDRESS               0xfe020000</span><br><span> #define EARLY_I2C_BASE(x) (EARLY_I2C_BASE_ADDRESS + (0x1000 * (x)))</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define UART_DEBUG_BASE_0_SIZE           0x1000</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * We provide base address of UART port we use in Kconfig directly.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Use that base address irrespective of port id since address will be correct</span><br><span style="color: hsl(120, 100%, 40%);">+ * for selected port by user.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#define UART_BASE_0_ADDR(x)             CONFIG_CONSOLE_UART_BASE_ADDRESS</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* _SOC_APOLLOLAKE_IOMAP_H_ */</span><br><span>diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c</span><br><span>index 54b280d..c6acd97 100644</span><br><span>--- a/src/soc/intel/apollolake/uart.c</span><br><span>+++ b/src/soc/intel/apollolake/uart.c</span><br><span>@@ -20,13 +20,11 @@</span><br><span>  * shouldn't cause any fragmentation.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span> #include <console/uart.h></span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <intelblocks/uart.h></span><br><span> #include <soc/gpio.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/nvs.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/uart.h></span><br><span> </span><br><span>@@ -76,35 +74,6 @@</span><br><span> </span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#if !ENV_SMM</span><br><span style="color: hsl(0, 100%, 40%);">-void pch_uart_read_resources(struct device *dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-    pci_dev_read_resources(dev);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    if (IS_ENABLED(CONFIG_SOC_UART_DEBUG) &&</span><br><span style="color: hsl(0, 100%, 40%);">-                uart_is_debug_controller(dev)) {</span><br><span style="color: hsl(0, 100%, 40%);">-                /* will override existing resource. */</span><br><span style="color: hsl(0, 100%, 40%);">-          fixed_mem_resource(dev, PCI_BASE_ADDRESS_0,</span><br><span style="color: hsl(0, 100%, 40%);">-                             CONFIG_CONSOLE_UART_BASE_ADDRESS >> 10, 4, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-    }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-bool pch_uart_init_debug_controller_on_resume(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-    global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    if (gnvs)</span><br><span style="color: hsl(0, 100%, 40%);">-               return !!gnvs->uior;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-device_t pch_uart_get_debug_controller(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-     return _PCH_DEV(UART, CONFIG_UART_FOR_CONSOLE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> uintptr_t uart_platform_base(int idx)</span><br><span> {</span><br><span>       return CONFIG_CONSOLE_UART_BASE_ADDRESS;</span><br><span>diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c</span><br><span>index 6aad685..5ccad3f 100644</span><br><span>--- a/src/soc/intel/cannonlake/uart.c</span><br><span>+++ b/src/soc/intel/cannonlake/uart.c</span><br><span>@@ -14,16 +14,13 @@</span><br><span>  */</span><br><span> </span><br><span> #include <assert.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span> #include <console/uart.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <intelblocks/gpio.h></span><br><span> #include <intelblocks/lpss.h></span><br><span> #include <intelblocks/pcr.h></span><br><span> #include <intelblocks/uart.h></span><br><span> #include <soc/iomap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/nvs.h></span><br><span> #include <soc/pch.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/pcr_ids.h></span><br><span>@@ -85,41 +82,3 @@</span><br><span>    return UART_BASE_0_ADDR(idx);</span><br><span> }</span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-device_t pch_uart_get_debug_controller(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-       switch (CONFIG_UART_FOR_CONSOLE) {</span><br><span style="color: hsl(0, 100%, 40%);">-      case 0:</span><br><span style="color: hsl(0, 100%, 40%);">-         return PCH_DEV_UART0;</span><br><span style="color: hsl(0, 100%, 40%);">-   case 1:</span><br><span style="color: hsl(0, 100%, 40%);">-         return PCH_DEV_UART1;</span><br><span style="color: hsl(0, 100%, 40%);">-   case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">-                return PCH_DEV_UART2;</span><br><span style="color: hsl(0, 100%, 40%);">-   }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void pch_uart_read_resources(struct device *dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-     pci_dev_read_resources(dev);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    /* Set the configured UART base address for the debug port */</span><br><span style="color: hsl(0, 100%, 40%);">-   if (IS_ENABLED(CONFIG_UART_DEBUG) && uart_is_debug_controller(dev)) {</span><br><span style="color: hsl(0, 100%, 40%);">-           struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">-          /* Need to set the base and size for the resource allocator. */</span><br><span style="color: hsl(0, 100%, 40%);">-         res->base = UART_BASE_0_ADDR(CONFIG_UART_FOR_CONSOLE);</span><br><span style="color: hsl(0, 100%, 40%);">-               res->size = UART_DEBUG_BASE_0_SIZE;</span><br><span style="color: hsl(0, 100%, 40%);">-          res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |</span><br><span style="color: hsl(0, 100%, 40%);">-                  IORESOURCE_FIXED;</span><br><span style="color: hsl(0, 100%, 40%);">-       }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-bool pch_uart_init_debug_controller_on_resume(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-  global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    if (gnvs)</span><br><span style="color: hsl(0, 100%, 40%);">-               return !!gnvs->uior;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c</span><br><span>index cdbe56b..8914da4 100644</span><br><span>--- a/src/soc/intel/common/block/uart/uart.c</span><br><span>+++ b/src/soc/intel/common/block/uart/uart.c</span><br><span>@@ -15,6 +15,7 @@</span><br><span> </span><br><span> #include <arch/acpi.h></span><br><span> #include <compiler.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbmem.h></span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_def.h></span><br><span>@@ -22,6 +23,9 @@</span><br><span> #include <device/pci_ops.h></span><br><span> #include <intelblocks/lpss.h></span><br><span> #include <intelblocks/uart.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pci_devs.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/iomap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/nvs.h></span><br><span> </span><br><span> #define UART_PCI_ENABLE (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER)</span><br><span> </span><br><span>@@ -46,15 +50,17 @@</span><br><span>  uart_lpss_init(baseaddr);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-__weak device_t pch_uart_get_debug_controller(void)</span><br><span style="color: hsl(120, 100%, 40%);">+device_t pch_uart_get_debug_controller(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-        /*</span><br><span style="color: hsl(0, 100%, 40%);">-       * device_t can either be a pointer to struct device (e.g. ramstage) or</span><br><span style="color: hsl(0, 100%, 40%);">-  * a simple integer (e.g. SMM) depending upon whether __SIMPLE_DEVICE__</span><br><span style="color: hsl(0, 100%, 40%);">-  * is defined for the stage. Thus, the return requires additional</span><br><span style="color: hsl(0, 100%, 40%);">-        * casting to uintptr_t.</span><br><span style="color: hsl(0, 100%, 40%);">-         */</span><br><span style="color: hsl(0, 100%, 40%);">-     return (device_t)(uintptr_t)NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+     switch (CONFIG_UART_FOR_CONSOLE) {</span><br><span style="color: hsl(120, 100%, 40%);">+    case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+               return PCH_DEV_UART0;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+               return PCH_DEV_UART1;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+       default:</span><br><span style="color: hsl(120, 100%, 40%);">+              return PCH_DEV_UART2;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> bool uart_debug_controller_is_initialized(void)</span><br><span>@@ -79,14 +85,28 @@</span><br><span> </span><br><span> #if ENV_RAMSTAGE</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-__weak void pch_uart_read_resources(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void pch_uart_read_resources(struct device *dev)</span><br><span> {</span><br><span>        pci_dev_read_resources(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+        /* Set the configured UART base address for the debug port */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_UART_DEBUG) && uart_is_debug_controller(dev)) {</span><br><span style="color: hsl(120, 100%, 40%);">+         struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+                /* Need to set the base and size for the resource allocator. */</span><br><span style="color: hsl(120, 100%, 40%);">+               res->base = UART_BASE_0_ADDR(CONFIG_UART_FOR_CONSOLE);</span><br><span style="color: hsl(120, 100%, 40%);">+             res->size = UART_DEBUG_BASE_0_SIZE;</span><br><span style="color: hsl(120, 100%, 40%);">+                res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |</span><br><span style="color: hsl(120, 100%, 40%);">+                        IORESOURCE_FIXED;</span><br><span style="color: hsl(120, 100%, 40%);">+     }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-__weak bool pch_uart_init_debug_controller_on_resume(void)</span><br><span style="color: hsl(120, 100%, 40%);">+bool pch_uart_init_debug_controller_on_resume(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-  /* By default, do not initialize controller. */</span><br><span style="color: hsl(120, 100%, 40%);">+       global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+        if (gnvs)</span><br><span style="color: hsl(120, 100%, 40%);">+             return !!gnvs->uior;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    return false;</span><br><span> }</span><br><span> </span><br><span>@@ -173,8 +193,8 @@</span><br><span> };</span><br><span> </span><br><span> static const struct pci_driver pch_uart __pci_driver = {</span><br><span style="color: hsl(0, 100%, 40%);">-      .ops    = &device_ops,</span><br><span style="color: hsl(0, 100%, 40%);">-      .vendor = PCI_VENDOR_ID_INTEL,</span><br><span style="color: hsl(0, 100%, 40%);">-  .devices        = pci_device_ids,</span><br><span style="color: hsl(120, 100%, 40%);">+     .ops     = &device_ops,</span><br><span style="color: hsl(120, 100%, 40%);">+   .vendor  = PCI_VENDOR_ID_INTEL,</span><br><span style="color: hsl(120, 100%, 40%);">+       .devices = pci_device_ids,</span><br><span> };</span><br><span> #endif /* ENV_RAMSTAGE */</span><br><span>diff --git a/src/soc/intel/skylake/uart.c b/src/soc/intel/skylake/uart.c</span><br><span>index 6f3c21e..69b0e95 100644</span><br><span>--- a/src/soc/intel/skylake/uart.c</span><br><span>+++ b/src/soc/intel/skylake/uart.c</span><br><span>@@ -14,16 +14,13 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span> #include <console/uart.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/pci.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <gpio.h></span><br><span> #include <intelblocks/lpss.h></span><br><span> #include <intelblocks/pcr.h></span><br><span> #include <intelblocks/uart.h></span><br><span> #include <soc/bootblock.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/nvs.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/pcr_ids.h></span><br><span> </span><br><span>@@ -66,35 +63,3 @@</span><br><span> </span><br><span>   gpio_configure_pads(uart2_pads, ARRAY_SIZE(uart2_pads));</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if !ENV_SMM</span><br><span style="color: hsl(0, 100%, 40%);">-void pch_uart_read_resources(struct device *dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-      pci_dev_read_resources(dev);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    /* Set the configured UART base address for the debug port */</span><br><span style="color: hsl(0, 100%, 40%);">-   if (IS_ENABLED(CONFIG_UART_DEBUG) && uart_is_debug_controller(dev)) {</span><br><span style="color: hsl(0, 100%, 40%);">-           struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">-          /* Need to set the base and size for the resource allocator. */</span><br><span style="color: hsl(0, 100%, 40%);">-         res->base = UART_BASE_0_ADDR(CONFIG_UART_FOR_CONSOLE);</span><br><span style="color: hsl(0, 100%, 40%);">-               res->size = UART_DEBUG_BASE_0_SIZE;</span><br><span style="color: hsl(0, 100%, 40%);">-          res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |</span><br><span style="color: hsl(0, 100%, 40%);">-                  IORESOURCE_FIXED;</span><br><span style="color: hsl(0, 100%, 40%);">-       }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-bool pch_uart_init_debug_controller_on_resume(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-    global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-    if (gnvs)</span><br><span style="color: hsl(0, 100%, 40%);">-               return !!gnvs->uior;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-device_t pch_uart_get_debug_controller(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-     return PCH_DEV_UART2;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26164">change 26164</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26164"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I109d0e5c942e499cb763bde47cb7d53dfbf5cef6 </div>
<div style="display:none"> Gerrit-Change-Number: 26164 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela@intel.com> </div>