<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26145">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">vc/amd/00670F00: Sync AGESA.h with PI blob<br><br>Add a new callout definition for AgesaGetHeapBaseInDram and displace<br>AgesaHeapRebase (which was merged too soon) in the ordering.  Also<br>add its structure.<br><br>AGESA will be modified to ask coreboot for the location for temporary<br>storage of heap data at the end of InitPost.  The old methodology is<br>to use 0xb0000 but the change will allow coreboot to determine the<br>location.<br><br>BUG=b:74518368<br><br>Change-Id: I0bc894d7842cf4b3eb728a90704277b17f4bf7be<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/vendorcode/amd/pi/00670F00/AGESA.h<br>1 file changed, 17 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/26145/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>index ba1e505..4c30bbe 100644</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>+++ b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>@@ -68,7 +68,8 @@</span><br><span> #define AGESA_IDLE_AN_AP                        0x00028107ul</span><br><span> #define AGESA_WAIT_FOR_ALL_APS                  0x00028108ul</span><br><span> #define AGESA_HALT_THIS_AP                      0x00028109ul</span><br><span style="color: hsl(0, 100%, 40%);">-#define AGESA_HEAP_REBASE                       0x0002810aul</span><br><span style="color: hsl(120, 100%, 40%);">+#define AGESA_GET_HEAP_BASE_IN_DRAM             0x0002810Aul</span><br><span style="color: hsl(120, 100%, 40%);">+#define AGESA_HEAP_REBASE                       0x0002810Bul</span><br><span> </span><br><span> // AGESA ADVANCED CALLOUTS, Memory</span><br><span> #define AGESA_READ_SPD                 0x00028140ul</span><br><span>@@ -2528,6 +2529,15 @@</span><br><span>                                            ///  be enabled</span><br><span> } AGESA_HALT_THIS_AP_PARAMS;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/// Parameters structure for interface call-out AgesaGetHeapBaseInDram</span><br><span style="color: hsl(120, 100%, 40%);">+typedef struct {</span><br><span style="color: hsl(120, 100%, 40%);">+  IN OUT    AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration</span><br><span style="color: hsl(120, 100%, 40%);">+                                                ///  header</span><br><span style="color: hsl(120, 100%, 40%);">+     OUT    UINTN             HeapDramAddress;  ///< The main memory address</span><br><span style="color: hsl(120, 100%, 40%);">+                                                ///  where heap contents will be</span><br><span style="color: hsl(120, 100%, 40%);">+                                                ///  temporarily stored</span><br><span style="color: hsl(120, 100%, 40%);">+} AGESA_HEAP_BASE_IN_DRAM_PARAMS;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /// VoltageType values</span><br><span> typedef enum {</span><br><span>   VTYPE_CPU_VREF,                                    ///< Cpu side Vref</span><br><span>@@ -2615,6 +2625,12 @@</span><br><span>   );</span><br><span> </span><br><span> AGESA_STATUS</span><br><span style="color: hsl(120, 100%, 40%);">+AgesaGetHeapBaseInDram (</span><br><span style="color: hsl(120, 100%, 40%);">+  IN       UINTN                            FcnData,</span><br><span style="color: hsl(120, 100%, 40%);">+  IN OUT   AGESA_HEAP_BASE_IN_DRAM_PARAMS   *HeapBaseInDramParams</span><br><span style="color: hsl(120, 100%, 40%);">+  );</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS</span><br><span> AgesaRunFcnOnAp (</span><br><span>   IN        UINTN               ApicIdOfCore,</span><br><span>   IN        AP_EXE_PARAMS       *LaunchApParams</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26145">change 26145</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26145"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0bc894d7842cf4b3eb728a90704277b17f4bf7be </div>
<div style="display:none"> Gerrit-Change-Number: 26145 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>