<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26146">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/pi: Add AgesaGetHeapBaseInDram callout<br><br>Implement a new AGESA callout that may be used to find the correct<br>temporary location in DRAM to store heap data.<br><br>Near the end of AmdInitPost, AGESA migrates its heap from a CAR-based<br>location to a temporary region. Once cbmem has been established, the<br>heap will be relocated again in AmdInitEnv from the temp location to<br>the final one.<br><br>TEST=Boot grunt with patchstack and experimental blob<br>BUG=b:74518368<br><br>Change-Id: Ibc5cc988e3e80d78f50cf0195e952b657141e570<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h<br>M src/soc/amd/common/block/pi/Kconfig<br>M src/soc/amd/common/block/pi/def_callouts.c<br>M src/soc/amd/common/block/pi/heapmanager.c<br>4 files changed, 33 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/26146/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>index 34131cf..eefcbdf 100644</span><br><span>--- a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>+++ b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>@@ -33,6 +33,8 @@</span><br><span> UINT32 NextNodeOffset;</span><br><span> } BIOS_BUFFER_NODE;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS agesa_GetHeapBaseInDram(UINT32 Func, UINTN Data, VOID *ConfigPtr);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> AGESA_STATUS agesa_AllocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);</span><br><span> AGESA_STATUS agesa_DeallocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);</span><br><span> AGESA_STATUS agesa_LocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);</span><br><span>diff --git a/src/soc/amd/common/block/pi/Kconfig b/src/soc/amd/common/block/pi/Kconfig</span><br><span>index bd5926f..547232e 100644</span><br><span>--- a/src/soc/amd/common/block/pi/Kconfig</span><br><span>+++ b/src/soc/amd/common/block/pi/Kconfig</span><br><span>@@ -4,3 +4,23 @@</span><br><span> default n</span><br><span> help</span><br><span> This option builds functions that interface AMD's AGESA.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+if SOC_AMD_COMMON_BLOCK_PI</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config PI_AGESA_TEMP_RAM_BASE</span><br><span style="color: hsl(120, 100%, 40%);">+ hex</span><br><span style="color: hsl(120, 100%, 40%);">+ default 0x100000</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ During a boot from S5, AGESA copies its CAR-based heap to a temporary</span><br><span style="color: hsl(120, 100%, 40%);">+ location in DRAM. Once coreboot has established cbmem, the heap</span><br><span style="color: hsl(120, 100%, 40%);">+ is moved again. This symbol determines the temporary location for</span><br><span style="color: hsl(120, 100%, 40%);">+ the heap.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config PI_AGESA_HEAP_SIZE</span><br><span style="color: hsl(120, 100%, 40%);">+ hex</span><br><span style="color: hsl(120, 100%, 40%);">+ default 0x20000</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ This option determines the amount of space allowed for AGESA heap</span><br><span style="color: hsl(120, 100%, 40%);">+ prior to DRAM availability.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+endif</span><br><span>diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>index fc3a88b..05951da 100644</span><br><span>--- a/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>+++ b/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>@@ -45,6 +45,7 @@</span><br><span> { AGESA_LOCATE_BUFFER, agesa_LocateBuffer },</span><br><span> { AGESA_READ_SPD, agesa_ReadSpd },</span><br><span> { AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl },</span><br><span style="color: hsl(120, 100%, 40%);">+ { AGESA_GET_HEAP_BASE_IN_DRAM, agesa_GetHeapBaseInDram },</span><br><span> #if ENV_RAMSTAGE</span><br><span> { AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },</span><br><span> { AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps },</span><br><span>diff --git a/src/soc/amd/common/block/pi/heapmanager.c b/src/soc/amd/common/block/pi/heapmanager.c</span><br><span>index 4bf456a..0a22f31 100644</span><br><span>--- a/src/soc/amd/common/block/pi/heapmanager.c</span><br><span>+++ b/src/soc/amd/common/block/pi/heapmanager.c</span><br><span>@@ -30,6 +30,16 @@</span><br><span> memset(BiosManagerPtr, 0, BIOS_HEAP_SIZE);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS agesa_GetHeapBaseInDram(UINT32 Func, UINTN Data, VOID *ConfigPtr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ AGESA_HEAP_BASE_IN_DRAM_PARAMS *pHeapBaseInDram;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pHeapBaseInDram = (AGESA_HEAP_BASE_IN_DRAM_PARAMS *)ConfigPtr;</span><br><span style="color: hsl(120, 100%, 40%);">+ pHeapBaseInDram->HeapDramAddress = CONFIG_PI_AGESA_TEMP_RAM_BASE;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return AGESA_SUCCESS;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /*</span><br><span> * Name FindAllocatedNode</span><br><span> * Brief description Find an allocated node that matches the handle.</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26146">change 26146</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ibc5cc988e3e80d78f50cf0195e952b657141e570 </div>
<div style="display:none"> Gerrit-Change-Number: 26146 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: Marshall Dawson <marshall.dawson@scarletltd.com> </div>