<p>Piotr Król has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26116">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">pcengines/apu2: enable IOMMU for all apu2 variants<br><br>IOMMU was tested on Xen 4.8 and Linux kernel 4.14.33. Following feature<br>set is enabled:<br>(XEN) AMD-Vi: Disabled HAP memory map sharing with IOMMU<br>(XEN) AMD-Vi: IOMMU Extended Features:<br>(XEN) - Peripheral Page Service Request<br>(XEN) - Guest Translation<br>(XEN) - Invalidate All Command<br>(XEN) - Guest APIC supported<br>(XEN) - Performance Counters<br>(XEN) AMD-Vi: IOMMU 0 Enabled.<br><br>Change-Id: I6dbfae78849248f3532caa78974c8f2ce61a530d<br>Signed-off-by: Piotr Król <piotr.krol@3mdeb.com><br>---<br>M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb<br>M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb<br>M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb<br>M src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb<br>4 files changed, 4 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/26116/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb</span><br><span>index 4f32064..2905e2c 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb</span><br><span>@@ -25,7 +25,7 @@</span><br><span> </span><br><span> chip northbridge/amd/pi/00730F01 # PCI side of HT root complex</span><br><span> device pci 0.0 on end # Root Complex</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.2 off end # IOMMU</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.2 on end # IOMMU</span><br><span> device pci 1.0 off end # Internal Graphics P2P bridge 0x9804</span><br><span> device pci 1.1 off end # Internal Multimedia</span><br><span> device pci 2.0 on end # PCIe Host Bridge</span><br><span>diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb</span><br><span>index c431291..4da123e 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb</span><br><span>@@ -25,7 +25,7 @@</span><br><span> </span><br><span> chip northbridge/amd/pi/00730F01 # PCI side of HT root complex</span><br><span> device pci 0.0 on end # Root Complex</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.2 off end # IOMMU</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.2 on end # IOMMU</span><br><span> device pci 1.0 off end # Internal Graphics P2P bridge 0x9804</span><br><span> device pci 1.1 off end # Internal Multimedia</span><br><span> device pci 2.0 on end # PCIe Host Bridge</span><br><span>diff --git a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb</span><br><span>index 9859255..b95afab 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb</span><br><span>@@ -25,7 +25,7 @@</span><br><span> </span><br><span> chip northbridge/amd/pi/00730F01 # PCI side of HT root complex</span><br><span> device pci 0.0 on end # Root Complex</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.2 off end # IOMMU</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.2 on end # IOMMU</span><br><span> device pci 1.0 off end # Internal Graphics P2P bridge 0x9804</span><br><span> device pci 1.1 off end # Internal Multimedia</span><br><span> device pci 2.0 on end # PCIe Host Bridge</span><br><span>diff --git a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb</span><br><span>index 4bdaaaf..b5700f8 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb</span><br><span>+++ b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb</span><br><span>@@ -25,7 +25,7 @@</span><br><span> </span><br><span> chip northbridge/amd/pi/00730F01 # PCI side of HT root complex</span><br><span> device pci 0.0 on end # Root Complex</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.2 off end # IOMMU</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.2 on end # IOMMU</span><br><span> device pci 1.0 off end # Internal Graphics P2P bridge 0x9804</span><br><span> device pci 1.1 off end # Internal Multimedia</span><br><span> device pci 2.0 on end # PCIe Host Bridge</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26116">change 26116</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6dbfae78849248f3532caa78974c8f2ce61a530d </div>
<div style="display:none"> Gerrit-Change-Number: 26116 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Piotr Król <piotr.krol@3mdeb.com> </div>