<p>Maulik V Vaghela has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26029">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/basecode: Add common I2C support for CNL PCH<br><br>I2C configuration depends on PCH, so if more than one SOC uses same PCH<br>configuration, code for I2C will be common across those SOC.<br><br>Since we keep i2c code in soc, it increases amount of code copy during<br>creation of new soc. Thus making code common will allow us to use common<br>i2c functionality across multiple SOCs. Once User selects<br>"CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP", it'll use i2c function from<br>common pool and soc will only need to implement function which returns<br>soc specific i2c configuration.<br><br>BUG=none<br>BRANCH=none<br>TEST= code compiles with different configurations<br><br>Change-Id: Ie77b213026e6a76ba50de2ba16240a72ee3e6416<br>Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com><br>---<br>M src/soc/intel/common/basecode/pch/Kconfig<br>A src/soc/intel/common/basecode/pch/Makefile.inc<br>A src/soc/intel/common/basecode/pch/i2c.c<br>3 files changed, 77 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/26029/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/basecode/pch/Kconfig b/src/soc/intel/common/basecode/pch/Kconfig</span><br><span>index 7372a56..e755d31 100644</span><br><span>--- a/src/soc/intel/common/basecode/pch/Kconfig</span><br><span>+++ b/src/soc/intel/common/basecode/pch/Kconfig</span><br><span>@@ -1,5 +1,14 @@</span><br><span> config SOC_INTEL_COMMON_BASECODE_PCH_CNP</span><br><span> bool</span><br><span> default n</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C</span><br><span> help</span><br><span style="color: hsl(0, 100%, 40%);">- "Select CNL PCH support for the SOC"</span><br><span style="color: hsl(120, 100%, 40%);">+ "Select support for CNL PCH common code"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOC_INTEL_COMMON_BLOCK_I2C</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ "Selects support for CNL PCH I2C block. This block is common across</span><br><span style="color: hsl(120, 100%, 40%);">+ SOC which uses CNL PCH"</span><br><span>diff --git a/src/soc/intel/common/basecode/pch/Makefile.inc b/src/soc/intel/common/basecode/pch/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..72701d7</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/basecode/pch/Makefile.inc</span><br><span>@@ -0,0 +1,4 @@</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C)+=i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C)+=i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C)+=i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C)+=i2c.c</span><br><span>diff --git a/src/soc/intel/common/basecode/pch/i2c.c b/src/soc/intel/common/basecode/pch/i2c.c</span><br><span>new file mode 100644</span><br><span>index 0000000..e6bcd9a</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/basecode/pch/i2c.c</span><br><span>@@ -0,0 +1,63 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_def.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <drivers/i2c/designware/dw_i2c.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/iomap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pci_devs.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ return EARLY_I2C_BASE(bus);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int dw_i2c_soc_devfn_to_bus(unsigned int devfn)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (devfn) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C0:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C1:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C2:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 2;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C3:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C4:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 4;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C5:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 5;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int dw_i2c_soc_bus_to_devfn(unsigned int bus)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (bus) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C0;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C1;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C2;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C3;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C4;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C5;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26029">change 26029</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie77b213026e6a76ba50de2ba16240a72ee3e6416 </div>
<div style="display:none"> Gerrit-Change-Number: 26029 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela@intel.com> </div>