<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25880">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">southbridge/intel: Remove space before/after parenthesis<br><br>Change-Id: Id1bc0c88aeecc3f1d12964346326e5b087a2985e<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/southbridge/intel/bd82x6x/lpc.c<br>M src/southbridge/intel/fsp_bd82x6x/lpc.c<br>M src/southbridge/intel/fsp_i89xx/lpc.c<br>M src/southbridge/intel/fsp_rangeley/lpc.c<br>M src/southbridge/intel/i82371eb/acpi/i82371eb.asl<br>M src/southbridge/intel/i82371eb/smbus.c<br>M src/southbridge/intel/i82801dx/ac97.c<br>M src/southbridge/intel/i82801dx/lpc.c<br>M src/southbridge/intel/i82801ix/lpc.c<br>M src/southbridge/intel/i82801jx/lpc.c<br>M src/southbridge/intel/ibexpeak/lpc.c<br>M src/southbridge/intel/lynxpoint/acpi/serialio.asl<br>M src/southbridge/intel/lynxpoint/lpc.c<br>13 files changed, 27 insertions(+), 27 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/25880/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>index 8d125eb..ea7a808 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>@@ -239,7 +239,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>index 73366f7..f17a44f 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>@@ -249,7 +249,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>index 8a815c5..3a17701 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>@@ -249,7 +249,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c</span><br><span>index cbb2297..b9af406 100644</span><br><span>--- a/src/southbridge/intel/fsp_rangeley/lpc.c</span><br><span>+++ b/src/southbridge/intel/fsp_rangeley/lpc.c</span><br><span>@@ -270,7 +270,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl</span><br><span>index 305da2a..cef36e9 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl</span><br><span>+++ b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl</span><br><span>@@ -29,11 +29,11 @@</span><br><span> /* 8259-compatible Programmable Interrupt Controller */</span><br><span> Device (PIC)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- Name (_HID, EisaId ("PNP0000") )</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId ("PNP0000"))</span><br><span> Name (_CRS, ResourceTemplate ()</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- IO (Decode16, 0x0020, 0x0020, 0x01, 0x02, )</span><br><span style="color: hsl(0, 100%, 40%);">- IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02, )</span><br><span style="color: hsl(120, 100%, 40%);">+ IO (Decode16, 0x0020, 0x0020, 0x01, 0x02,)</span><br><span style="color: hsl(120, 100%, 40%);">+ IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02,)</span><br><span> IRQNoFlags () {2}</span><br><span> })</span><br><span> }</span><br><span>@@ -41,10 +41,10 @@</span><br><span> /* PC-class DMA Controller */</span><br><span> Device (DMA1)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- Name (_HID, EisaId ("PNP0200") )</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId ("PNP0200"))</span><br><span> Name (_CRS, ResourceTemplate ()</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- DMA (Compatibility, BusMaster, Transfer8, ) {4}</span><br><span style="color: hsl(120, 100%, 40%);">+ DMA (Compatibility, BusMaster, Transfer8,) {4}</span><br><span> IO (Decode16, 0x0000, 0x0000, 0x01, 0x10,)</span><br><span> IO (Decode16, 0x0080, 0x0080, 0x01, 0x11,)</span><br><span> IO (Decode16, 0x0094, 0x0094, 0x01, 0x0C,)</span><br><span>@@ -66,7 +66,7 @@</span><br><span> /* AT Real-Time Clock */</span><br><span> Device (RTC)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- Name (_HID, EisaId ("PNP0B00") )</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId ("PNP0B00"))</span><br><span> Name (_CRS, ResourceTemplate ()</span><br><span> {</span><br><span> IO (Decode16,0x0070,0x0070,0x01,0x04,)</span><br><span>@@ -86,7 +86,7 @@</span><br><span> /* x87-compatible Floating Point Processing Unit */</span><br><span> Device (COPR)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- Name (_HID, EisaId ("PNP0C04") )</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId ("PNP0C04"))</span><br><span> Name (_CRS, ResourceTemplate ()</span><br><span> {</span><br><span> IO (Decode16,0x00F0,0x00F0,0x01,0x10,)</span><br><span>diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c</span><br><span>index 3477c52..5b95c57 100644</span><br><span>--- a/src/southbridge/intel/i82371eb/smbus.c</span><br><span>+++ b/src/southbridge/intel/i82371eb/smbus.c</span><br><span>@@ -68,7 +68,7 @@</span><br><span> * power-on default is 0x7fffbfffh */</span><br><span> if (gpo) {</span><br><span> /* only 8bit access allowed */</span><br><span style="color: hsl(0, 100%, 40%);">- outb( gpo & 0xff, DEFAULT_PMBASE + GPO0);</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(gpo & 0xff, DEFAULT_PMBASE + GPO0);</span><br><span> outb((gpo >> 8) & 0xff, DEFAULT_PMBASE + GPO1);</span><br><span> outb((gpo >> 16) & 0xff, DEFAULT_PMBASE + GPO2);</span><br><span> outb((gpo >> 24) & 0xff, DEFAULT_PMBASE + GPO3);</span><br><span>diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c</span><br><span>index 3ed83b7..f9a7904 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/ac97.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/ac97.c</span><br><span>@@ -220,7 +220,7 @@</span><br><span> mbar = pci_read_config16(dev, MBAR) & 0xfffe;</span><br><span> </span><br><span> reg16 = inw(mmbar + EXT_MODEM_ID1);</span><br><span style="color: hsl(0, 100%, 40%);">- if ((reg16 & 0xc000) != 0xc000 ) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((reg16 & 0xc000) != 0xc000) {</span><br><span> if (reg16 & (1 << 0)) {</span><br><span> reg32 = inw(mmbar + VENDOR_ID2);</span><br><span> reg32 <<= 16;</span><br><span>diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>index 3502c8b..0f0bbcf 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>@@ -155,7 +155,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Disable NMI. */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Disable NMI. */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c</span><br><span>index bc45b9d..abc8667 100644</span><br><span>--- a/src/southbridge/intel/i82801ix/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801ix/lpc.c</span><br><span>@@ -227,7 +227,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>index 18025ff..c631da9 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>@@ -229,7 +229,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>index 559ad06..857a53e 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>+++ b/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>@@ -231,7 +231,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl</span><br><span>index e8e81c3..9323b91 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl</span><br><span>+++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl</span><br><span>@@ -131,7 +131,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}</span><br><span> })</span><br><span> </span><br><span> Method (_CRS, 0, NotSerialized)</span><br><span>@@ -172,7 +172,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}</span><br><span> })</span><br><span> </span><br><span> // DMA channels are only used if Serial IO DMA controller is enabled</span><br><span>@@ -254,7 +254,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}</span><br><span> })</span><br><span> </span><br><span> // DMA channels are only used if Serial IO DMA controller is enabled</span><br><span>@@ -333,7 +333,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}</span><br><span> })</span><br><span> </span><br><span> Method (_CRS, 0, NotSerialized)</span><br><span>@@ -371,7 +371,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7}</span><br><span> })</span><br><span> </span><br><span> // DMA channels are only used if Serial IO DMA controller is enabled</span><br><span>@@ -422,7 +422,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13}</span><br><span> })</span><br><span> </span><br><span> // DMA channels are only used if Serial IO DMA controller is enabled</span><br><span>@@ -473,7 +473,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13}</span><br><span> })</span><br><span> </span><br><span> Method (_CRS, 0, NotSerialized)</span><br><span>@@ -511,7 +511,7 @@</span><br><span> Name (RBUF, ResourceTemplate ()</span><br><span> {</span><br><span> Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0)</span><br><span style="color: hsl(0, 100%, 40%);">- Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {5}</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {5}</span><br><span> })</span><br><span> </span><br><span> Method (_CRS, 0, NotSerialized)</span><br><span>@@ -560,7 +560,7 @@</span><br><span> , // ResourceSource</span><br><span> BAR0)</span><br><span> Interrupt (ResourceConsumer,</span><br><span style="color: hsl(0, 100%, 40%);">- Level, ActiveHigh, Shared, , , ) {14}</span><br><span style="color: hsl(120, 100%, 40%);">+ Level, ActiveHigh, Shared, , ,) {14}</span><br><span> })</span><br><span> </span><br><span> Method (_CRS, 0, NotSerialized)</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>index 2e37950..d1d00c6 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>@@ -247,7 +247,7 @@</span><br><span> reg8 &= ~(1 << 7); /* Set NMI. */</span><br><span> } else {</span><br><span> printk(BIOS_INFO, "NMI sources disabled.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */</span><br><span> }</span><br><span> outb(reg8, 0x70);</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25880">change 25880</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25880"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id1bc0c88aeecc3f1d12964346326e5b087a2985e </div>
<div style="display:none"> Gerrit-Change-Number: 25880 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>