<p>Mario Scheithauer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25785">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">siemens/mc_apl1: Provide baseboard and variant concepts<br><br>Siemens will provide further boards based on ApolloLake. These differ<br>only slightly. To avoid copying the complete directory of the reverence<br>board, we simply create variants that only contain the differences, like<br>google/reef does.<br><br>To further the ability of multiple variant boards to share code provide<br>a place to land the split up changes. This patch provides the tooling<br>using a new Kconfig value, VARIANT_DIR, as well as the Make plumbing.<br>The directory layout with a single variant, mc_apl1 (which is also the<br>baseboard), looks like this:<br><br>variants/baseboard - code<br>variants/baseboard/include/baseboard - headers<br>variants/mc_apl1 - code<br>variants/mc_apl1/include/variant - headers<br><br>New boards would then add themselves under their board name within the<br>'variants' directory.<br><br>No split has been done with providing different logic yet. This is<br>purely an organizational change.<br><br>Change-Id: Ia3c1f45daee3b9690a448b82edbeec552ee05973<br>Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com><br>---<br>M src/mainboard/siemens/mc_apl1/Kconfig<br>M src/mainboard/siemens/mc_apl1/Kconfig.name<br>M src/mainboard/siemens/mc_apl1/Makefile.inc<br>M src/mainboard/siemens/mc_apl1/board_info.txt<br>M src/mainboard/siemens/mc_apl1/mainboard.c<br>M src/mainboard/siemens/mc_apl1/romstage.c<br>A src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc<br>R src/mainboard/siemens/mc_apl1/variants/baseboard/devicetree.cb<br>R src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c<br>R src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/brd_gpio.h<br>C src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/brd_gpio.h<br>11 files changed, 43 insertions(+), 31 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/25785/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig</span><br><span>index ae86894..f3e4471 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/Kconfig</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/Kconfig</span><br><span>@@ -1,7 +1,6 @@</span><br><span style="color: hsl(0, 100%, 40%);">-if BOARD_SIEMENS_MC_APL1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config BOARD_SPECIFIC_OPTIONS</span><br><span style="color: hsl(0, 100%, 40%);">-      def_bool y</span><br><span style="color: hsl(120, 100%, 40%);">+config BOARD_SIEMENS_BASEBOARD_MC_APL1</span><br><span style="color: hsl(120, 100%, 40%);">+    def_bool n</span><br><span>   select SOC_INTEL_APOLLOLAKE</span><br><span>  select BOARD_ROMSIZE_KB_16384</span><br><span>        select HAVE_ACPI_TABLES</span><br><span>@@ -13,16 +12,26 @@</span><br><span>        select APL_SKIP_SET_POWER_LIMITS</span><br><span>     select NC_FPGA_NOTIFY_CB_READY</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+if BOARD_SIEMENS_BASEBOARD_MC_APL1</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config MAINBOARD_DIR</span><br><span>     string</span><br><span>       default siemens/mc_apl1</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config VARIANT_DIR</span><br><span style="color: hsl(120, 100%, 40%);">+       string</span><br><span style="color: hsl(120, 100%, 40%);">+        default "mc_apl1" if BOARD_SIEMENS_MC_APL1</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config DEVICETREE</span><br><span style="color: hsl(120, 100%, 40%);">+     string</span><br><span style="color: hsl(120, 100%, 40%);">+        default "variants/baseboard/devicetree.cb"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config MAINBOARD_PART_NUMBER</span><br><span>       string</span><br><span style="color: hsl(0, 100%, 40%);">-  default "MC APL1"</span><br><span style="color: hsl(120, 100%, 40%);">+   default "MC APL1" if BOARD_SIEMENS_MC_APL1</span><br><span> </span><br><span> config MAX_CPUS</span><br><span>  int</span><br><span style="color: hsl(0, 100%, 40%);">-     default 4</span><br><span style="color: hsl(120, 100%, 40%);">+     default 8</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-endif # BOARD_SIEMENS_MC_APL1</span><br><span style="color: hsl(120, 100%, 40%);">+endif # BOARD_SIEMENS_BASEBOARD_MC_APL1</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/Kconfig.name b/src/mainboard/siemens/mc_apl1/Kconfig.name</span><br><span>index bbc2a82..112bbb3 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/Kconfig.name</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/Kconfig.name</span><br><span>@@ -1,2 +1,3 @@</span><br><span> config BOARD_SIEMENS_MC_APL1</span><br><span>   bool "MC APL1"</span><br><span style="color: hsl(120, 100%, 40%);">+      select BOARD_SIEMENS_BASEBOARD_MC_APL1</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/Makefile.inc</span><br><span>index 223a45f..ec4d0ad 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/Makefile.inc</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/Makefile.inc</span><br><span>@@ -4,8 +4,12 @@</span><br><span> # It is put down only to the better understanding.</span><br><span> # The file is already included over src/arch/x86/Makefile.inc.</span><br><span> romstage-y += romstage.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += gpio.c</span><br><span> </span><br><span> ramstage-y += mainboard.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += gpio.c</span><br><span> ramstage-y += ptn3460.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+subdirs-y += variants/baseboard</span><br><span style="color: hsl(120, 100%, 40%);">+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+subdirs-y += variants/$(VARIANT_DIR)</span><br><span style="color: hsl(120, 100%, 40%);">+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/board_info.txt b/src/mainboard/siemens/mc_apl1/board_info.txt</span><br><span>index 01963ec..aa26105 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/board_info.txt</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/board_info.txt</span><br><span>@@ -1,4 +1,6 @@</span><br><span style="color: hsl(120, 100%, 40%);">+Vendor name: Siemens</span><br><span> Board name: MC APL1</span><br><span> Category: misc</span><br><span> ROM protocol: SPI</span><br><span> ROM socketed: no</span><br><span style="color: hsl(120, 100%, 40%);">+Flashrom support: yes</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>index 18cb660..959a8b6 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>@@ -2,7 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright 2016 Google Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Siemens AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017-2018 Siemens AG</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -32,7 +32,7 @@</span><br><span> #include <bootstate.h></span><br><span> #include <timer.h></span><br><span> #include <timestamp.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include "brd_gpio.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/brd_gpio.h></span><br><span> #include "ptn3460.h"</span><br><span> </span><br><span> #define MAX_PATH_DEPTH              12</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/romstage.c b/src/mainboard/siemens/mc_apl1/romstage.c</span><br><span>index 24d03b6..7f64933 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/romstage.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/romstage.c</span><br><span>@@ -2,7 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright 2016 Google Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Siemens AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017-2018 Siemens AG</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -21,7 +21,7 @@</span><br><span> #include <soc/romstage.h></span><br><span> #include <fsp/api.h></span><br><span> #include <FspmUpd.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include "brd_gpio.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/brd_gpio.h></span><br><span> </span><br><span> static const uint8_t Ch0_Bit_swizzling[] = {</span><br><span>      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..e3e87ce</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc</span><br><span>@@ -0,0 +1,3 @@</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += gpio.c</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/baseboard/devicetree.cb</span><br><span>similarity index 100%</span><br><span>rename from src/mainboard/siemens/mc_apl1/devicetree.cb</span><br><span>rename to src/mainboard/siemens/mc_apl1/variants/baseboard/devicetree.cb</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>similarity index 99%</span><br><span>rename from src/mainboard/siemens/mc_apl1/gpio.c</span><br><span>rename to src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>index b872b8d..a969bb1 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/gpio.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>@@ -2,7 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright 2016 Google Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Siemens AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017-2018 Siemens AG</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -14,9 +14,9 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include "baseboard/brd_gpio.h"</span><br><span> #include <commonlib/helpers.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include "brd_gpio.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/gpio.h></span><br><span> </span><br><span> /*</span><br><span>  * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/brd_gpio.h b/src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/brd_gpio.h</span><br><span>similarity index 86%</span><br><span>rename from src/mainboard/siemens/mc_apl1/brd_gpio.h</span><br><span>rename to src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/brd_gpio.h</span><br><span>index 5cf07a6..cc72e89 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/brd_gpio.h</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/brd_gpio.h</span><br><span>@@ -2,7 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Siemens AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017-2018 Siemens AG</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -14,8 +14,8 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _BRD_GPIO_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _BRD_GPIO_H_</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef _BASEBOARD_GPIO_H_</span><br><span style="color: hsl(120, 100%, 40%);">+#define _BASEBOARD_GPIO_H_</span><br><span> </span><br><span> #include <soc/gpio.h></span><br><span> </span><br><span>@@ -26,4 +26,4 @@</span><br><span> const struct pad_config *brd_gpio_table(size_t *num);</span><br><span> const struct pad_config *brd_early_gpio_table(size_t *num);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* _BRD_GPIO_H_ */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* _BASEBOARD_GPIO_H_ */</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/brd_gpio.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/brd_gpio.h</span><br><span>similarity index 62%</span><br><span>copy from src/mainboard/siemens/mc_apl1/brd_gpio.h</span><br><span>copy to src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/brd_gpio.h</span><br><span>index 5cf07a6..11b8878 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/brd_gpio.h</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/brd_gpio.h</span><br><span>@@ -2,7 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Siemens AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Siemens AG</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -14,16 +14,9 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _BRD_GPIO_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _BRD_GPIO_H_</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef _MAINBOARD_GPIO_H_</span><br><span style="color: hsl(120, 100%, 40%);">+#define _MAINBOARD_GPIO_H_</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <baseboard/brd_gpio.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * The next set of functions return the gpio table and fill in the number of</span><br><span style="color: hsl(0, 100%, 40%);">- * entries for each table.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-const struct pad_config *brd_gpio_table(size_t *num);</span><br><span style="color: hsl(0, 100%, 40%);">-const struct pad_config *brd_early_gpio_table(size_t *num);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* _BRD_GPIO_H_ */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* _MAINBOARD_GPIO_H_ */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25785">change 25785</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25785"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia3c1f45daee3b9690a448b82edbeec552ee05973 </div>
<div style="display:none"> Gerrit-Change-Number: 25785 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mario Scheithauer <mario.scheithauer@siemens.com> </div>