<p>Mario Scheithauer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25585">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">siemens/mc_apl1: Fix for using IDT PMIC<br><br>Due to an accuracy issue on IMON in the IDT PMIC, the reported system<br>power consumption was higher than the actual consumption. To prevent<br>this problem, a logic must be implement in mainboard_init(). This logic<br>consists of slope and offset as constants for Vcc and Vnn, which needs<br>to be programmed by coreboot. This fix compensates for the accuracy<br>issue.<br><br>Change-Id: I77faf95951d03ac6ce97a6721dba6e8466122a25<br>Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com><br>---<br>M src/mainboard/siemens/mc_apl1/mainboard.c<br>1 file changed, 80 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/25585/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>index fd19cd1..81e215b 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/mainboard.c</span><br><span>@@ -15,14 +15,17 @@</span><br><span> */</span><br><span> </span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <delay.h></span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include <gpio.h></span><br><span> #include <hwilib.h></span><br><span> #include <i210.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/lpc_lib.h></span><br><span> #include <intelblocks/pcr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/systemagent.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/pcr_ids.h></span><br><span> #include <string.h></span><br><span>@@ -35,6 +38,9 @@</span><br><span> #define MAX_PATH_DEPTH 12</span><br><span> #define MAX_NUM_MAPPINGS 10</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define BIOS_MAILBOX_DATA 0x7080</span><br><span style="color: hsl(120, 100%, 40%);">+#define BIOS_MAILBOX_INTERFACE 0x7084</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /** \brief This function can decide if a given MAC address is valid or not.</span><br><span> * Currently, addresses filled with 0xff or 0x00 are not valid.</span><br><span> * @param mac Buffer to the MAC address to check</span><br><span>@@ -114,9 +120,82 @@</span><br><span> {</span><br><span> const struct pad_config *pads;</span><br><span> size_t num;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t stall_count;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t power_max, data;</span><br><span> </span><br><span> pads = brd_gpio_table(&num);</span><br><span> gpio_configure_pads(pads, num);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: Configure PMIC IMON - Start\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Calculate CPU TDP in mW */</span><br><span style="color: hsl(120, 100%, 40%);">+ power_max = cpu_get_power_max();</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: CPU TDP %d mW.\n", power_max);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Fix Vnn slope and offset value.</span><br><span style="color: hsl(120, 100%, 40%);">+ * slope = 0x4a4 # 2.32</span><br><span style="color: hsl(120, 100%, 40%);">+ * offset = 0xfa0d # -2.975</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ stall_count = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ while (stall_count < 1000) {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Read P_CR_BIOS_MAILBOX_INTERFACE_0_0_0_MCHBAR */</span><br><span style="color: hsl(120, 100%, 40%);">+ data = MCHBAR32(BIOS_MAILBOX_INTERFACE);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Check RUN_BUSY bit. */</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((data & (1 << 31)) == (1 << 31))</span><br><span style="color: hsl(120, 100%, 40%);">+ mdelay(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ stall_count++;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (stall_count == 1000) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR,</span><br><span style="color: hsl(120, 100%, 40%);">+ "PMIC: Cannot set Vnn slope and offset value.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set Vnn values into P_CR_BIOS_MAILBOX_DATA_0_0_0_MCHBAR. */</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_DATA) = 0xfa0d04a4;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set command, address and busy bit. */</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000011d;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: Fix Vnn slope and offset value.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Fix Vcc slope and offset value.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Premium and High SKU:</span><br><span style="color: hsl(120, 100%, 40%);">+ * slope = 0x466 # 2.2</span><br><span style="color: hsl(120, 100%, 40%);">+ * offset = 0xe833 # -11.9</span><br><span style="color: hsl(120, 100%, 40%);">+ * Low and Intermediate SKU:</span><br><span style="color: hsl(120, 100%, 40%);">+ * slope = 0x3b3 # 1.85</span><br><span style="color: hsl(120, 100%, 40%);">+ * offset = 0xed33 # -9.4</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ stall_count = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ while (stall_count < 1000) {</span><br><span style="color: hsl(120, 100%, 40%);">+ data = MCHBAR32(BIOS_MAILBOX_INTERFACE);</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((data & (1 << 31)) == (1 << 31))</span><br><span style="color: hsl(120, 100%, 40%);">+ mdelay(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ stall_count++;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (stall_count == 1000) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR,</span><br><span style="color: hsl(120, 100%, 40%);">+ "PMIC: Cannot set Vcc slope and offset value.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * CPU TDP limit between Premium/High and Low/Intermediate SKU</span><br><span style="color: hsl(120, 100%, 40%);">+ * is 9010 mW.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (power_max > 9010) {</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_DATA) = 0xe8330466;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000001d;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: Fix Vcc for Premium SKU.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_DATA) = 0xed3303b3;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000001d;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: Fix Vcc for Low SKU.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "PMIC: Configure PMIC IMON - End\n");</span><br><span> }</span><br><span> </span><br><span> static void mainboard_final(void *chip_info)</span><br><span>@@ -125,7 +204,7 @@</span><br><span> uint16_t cmd = 0;</span><br><span> device_t dev = NULL;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /**</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span> * Set up the DP2LVDS converter.</span><br><span> * ptn3460_init() may only be executed after i2c bus init.</span><br><span> */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25585">change 25585</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I77faf95951d03ac6ce97a6721dba6e8466122a25 </div>
<div style="display:none"> Gerrit-Change-Number: 25585 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mario Scheithauer <mario.scheithauer@siemens.com> </div>